ZL6100EVAL1Z Intersil, ZL6100EVAL1Z Datasheet - Page 9

• Manufacturer Part Number: ZL6100EVAL1Z
• Description: EVAL BOARD USB ZL6100
• Manufacturer: Intersil

Specifications of ZL6100EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Power Conversion Overview
The ZL6100 operates as a voltage-mode, synchronous buck
converter with a selectable constant frequency pulse width
modulator (PWM) control scheme that uses external
MOSFETs, capacitors, and an inductor to perform power
conversion.
Figure 4 illustrates the basic synchronous buck converter
topology showing the primary power train components. This
converter is also called a step-down converter, as the output
voltage must always be lower than the input voltage. In its
most simple configuration, the ZL6100 requires two external
N-channel power MOSFETs, one for the top control
MOSFET (QH) and one for the bottom synchronous
MOSFET (QL). The amount of time that QH is on as a
fraction of the total switching period is known as the duty
cycle D, which is described by Equation 1:
D
≈
V
-------------
V
OUT
FIGURE 4. SYNCHRONOUS BUCK CONVERTER
IN
ZL6100
I
I
2
2
C
C
VR
SALRT
SALRT
SDA
SDA
SCL
SCL
SA(0,1)
SA(0,1)
VTRK
VTRK
SYNC
SYNC
D DC
D DC
BST
SW
GH
GL
>
>
CB
DB
PG
PG
REFCN
REFCN
V
9
IN
EN
EN
QH
QL
SYNC
SYNC
GEN
GEN
Communication
Communication
MGN
MGN
ILIM(0,1)
ILIM(0,1)
Power Management
Power Management
PLL
PLL
DAC
DAC
C
Compensator
Compensator
IN
Input Voltage Bus
Input Voltage Bus
Digital
Digital
SS
SS
C
V
FIGURE 3. ZL6100 BLOCK DIAGRAM
OUT
OUT
DLY(0,1)
DLY(0,1)
ADC
ADC
(EQ. 1)
V(0,1)
V(0,1)
ADC
ADC
ADC
ADC
D-PWM
D-PWM
FC(0,1)
FC(0,1)
NLR
NLR
ZL6100
NVM
NVM
M UX
M UX
VDD
VDD
During time D, QH is on and V
the inductor. The current ramps up as shown in Figure 5.
When QH turns off (time 1-D), the current flowing in the
inductor must continue to flow from the ground up through QL,
during which the current ramps down. Since the output
capacitor C
frequency, the AC component of the inductor current is filtered
from the output voltage so the load sees nearly a DC voltage.
Typically, buck converters specify a maximum duty cycle that
effectively limits the maximum output voltage that can be
realized for a given input voltage. This duty cycle limit
ensures that the lowside MOSFET is allowed to turn on for a
minimum amount of time during each switching cycle, which
enables the bootstrap capacitor (CB in Figure 4) to be
charged up and provide adequate gate drive voltage for the
Σ
Σ
+
+
MOSFET
MOSFET
Sensor
Sensor
Drivers
Drivers
VD D
VD D
TEMP
TEMP
-
-
Voltage
Voltage
Sensor
Sensor
VSEN
VSEN
V
IN
- V
OUT
-V
ISEN B
ISEN B
ISENA
ISENA
VSEN+
VSEN+
VSEN-
VSEN-
XTEMP
XTEMP
OUT
OUT
SW
SW
SW
SW
VR
VR
FIGURE 5. INDUCTOR WAVEFORM
0
BST
BST
exhibits a low impedance at the switching
D
TIME
IN
– V
1 - D
OUT
is applied across
V
V
OUT
OUT
IL
IL
I
O
December 15, 2010
PK
V
FN6876.2