PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 18

• Manufacturer Part Number: PIC24FJ64GB004-I/ML
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 16 Bit
• Program Memory Size: 64 KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Embedded Interface Type: I2C, LIN, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Memory”, and reprogrammed to the desired value. It is
programmed from a ‘1’ to ‘0’ to enable code protection.
PIC24FJ64GA1/GB0
3.7
Device configuration for PIC24FJ64GA1/GB0 devices
is stored in Flash Configuration Words at the end of the
user space program memory, and in multiple Configu-
ration Word registers located in the test space. These
registers reflect values read at any Reset from program
memory locations. The values for the Configuration
Words for the default device configurations are listed in
Table 3-6.
The values can be changed only by programming the
content of the corresponding Flash Configuration Word
and resetting the device. The Reset forces an automatic
reload of the Flash stored configuration values by
sequencing through the dedicated Flash Configuration
Words and transferring the data into the Configuration
registers.
For the PIC24FJ64GA1/GB0 families, the bit at
CW1<15> has a default state of ‘0’. This bit must always
be maintained as ‘0’ to ensure device functionality,
regardless of the settings of other Configuration bits.
To change the values of the Flash Configuration Word
once it has been programmed, the device must be Chip
Erased, as described in Section 3.5 “Erasing Program
not possible to program a ‘0’ to ‘1’, but they may be
DS39934B-page 18
Writing Configuration Words
TABLE 3-6:
Table 3-7 shows the ICSP programming details for pro-
gramming the Configuration Word locations, including
the serial pattern with the ICSP command code which
must be transmitted, Least Significant bit first, using the
PGCx and PGDx pins (see Figure 3-2).
In Step 1, the Reset vector is exited. In Step 2, the
NVMCON register is initialized for programming of
code memory. In Step 3, the 24-bit starting destination
address for programming is loaded into the TBLPAG
register and W7 register. The TBLPAG register must be
loaded with 00h for all (32 and 64-Kbyte) devices.
To verify the data by reading the Configuration Words
after performing the write in order, the code protection
bits initially should be programmed to a ‘1’ to ensure
that the verification can be performed properly. After
verification is finished, the code protection bit can be
programmed to a ‘0’ by using a word write to the
appropriate Configuration Word.
Last Word
Last Word – 2
Last Word – 4
Last Word – 6
Address
DEFAULT CONFIGURATION
REGISTER VALUES
© 2009 Microchip Technology Inc.
Name
CW1
CW2
CW3
CW4
Default Value
7FFFh
FFFFh
FFFFh
FFFFh