PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 37

• Manufacturer Part Number: PIC24FJ64GB004-I/ML
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 16 Bit
• Program Memory Size: 64 KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Embedded Interface Type: I2C, LIN, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

5.2.8
The PROGC command instructs the programming
executive to program a single Device ID register
located at the specified memory address.
After the specified data word has been programmed to
code memory, the programming executive verifies the
programmed data against the data in the command.
Expected Response (2 words):
© 2009 Microchip Technology Inc.
15
Opcode
Length
Reserved
Addr_MSB
Addr_LS
Data
Opcode
Field
1400h
0002h
Reserved
12 11
PROGC COMMAND
4h
4h
0h
MSB of 24-bit destination address
Least Significant 16 bits of 24-bit
destination address
8-bit data word
Addr_LS
Data
8 7
Description
Length
Addr_MSB
0
5.2.9
The PROGP command instructs the programming
executive to program one row of code memory, includ-
ing Configuration Words (64 instruction words), to the
specified memory address. Programming begins with
the row address specified in the command. The
destination address should be a multiple of 80h.
The data to program to memory, located in command
words, D_1 through D_96, must be arranged using the
packed instruction word format shown in Figure 5-5.
After all data has been programmed to code memory,
the programming executive verifies the programmed
data against the data in the command.
Expected Response (2 words):
15
Opcode
Length
Reserved
Addr_MSB
Addr_LS
D_1
D_2
...
D_96
PIC24FJ64GA1/GB0
Note:
Opcode
Field
1500h
0002h
Reserved
12 11
PROGP COMMAND
Refer to Table 2-2 for code memory size
information.
5h
63h
0h
MSB of 24-bit destination address
Least Significant 16 bits of 24-bit
destination address
16-Bit Data Word 1
16-Bit Data Word 2
16-Bit Data Word 3 through 95
16-Bit Data Word 96
Addr_LS
D_96
D_1
D_2
...
8 7
Description
Length
Addr_MSB
DS39934B-page 37
0