PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 38

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44

PIC24FJ64GB004-I/ML

Manufacturer Part Number
PIC24FJ64GB004-I/ML
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
16 Bit
Program Memory Size
64 KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GB004-I/ML
Manufacturer:
MICROCHIP
Quantity:
1 200
PIC24FJ64GA1/GB0
5.2.10
The PROGW command instructs the programming
executive to program one word of code memory
(3 bytes) to the specific memory address.
After the word has been programmed to code memory,
the programming executive verifies the programmed
data against the data in the command.
Expected Response (2 words):
DS39934B-page 38
15
Opcode
Length
Reserved
Addr_MSB
Addr_LS
Data_MSB
Data_LS
Opcode
1600h
0002h
Field
Data_MSB
12 11
PROGW COMMAND
Dh
4h
0h
MSB of 24-bit destination address
Least Significant 16 bits of 24-bit
destination address
MSB of 24-bit data
Least Significant 16 bits of 24-bit data
Addr_LS
Data_LS
8 7
Description
Length
Addr_MSB
0
5.2.11
The QBLANK command queries the programming
executive to determine if the contents of code memory
and code-protect Configuration bits (GCP and GWRP)
are blank (contain all ‘1’s). The size of code memory to
check must be specified in the command.
The Blank Check for code memory begins at 0h and
advances toward larger addresses for the specified
number of instruction words.
QBLANK returns a QE_Code of F0h if the specified
code memory and code-protect bits are blank;
otherwise, QBLANK returns a QE_Code of 0Fh.
Expected Response (2 words for blank device):
Expected Response (2 words for non-blank device):
15
Opcode
Length
PSize
Note:
Opcode
1AF0h
0002h
1A0Fh
0002h
Field
12 11
QBLANK COMMAND
QBLANK does not check the system
operation Configuration bits, since these
bits are not set to ‘1’ when a Chip Erase is
performed.
Ah
3h
Length of program memory to check
in 24-bit words plus one (max. of
49152)
PSize_MSW
PSize_LSW
© 2009 Microchip Technology Inc.
Description
Length
0

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