PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 26

• Manufacturer Part Number: PIC24FJ64GB004-I/ML
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 16 Bit
• Program Memory Size: 64 KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Embedded Interface Type: I2C, LIN, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ64GA1/GB0
4.4
The term “Blank Check” implies verifying that the
device has been successfully erased and has no
programmed memory locations. A blank or erased
memory location is always read as ‘1’.
The Device ID registers (FF0002h:FF0000h) can be
ignored by the Blank Check since this region stores
device information that cannot be erased. The device
Configuration registers are also ignored by the Blank
Check. Additionally, all unimplemented memory space
should be ignored by the Blank Check.
The QBLANK command is used for the Blank Check. It
determines if the code memory is erased by testing
these memory regions. A ‘BLANK’ or ‘NOT BLANK’
response is returned. If it is determined that the device
is not blank, it must be erased before attempting to
program the chip.
4.5
4.5.1
Code memory is programmed with the PROGP
command. PROGP programs one row of code memory
starting from the memory address specified in the
command. The number of PROGP commands
required to program a device depends on the number
of write blocks that must be programmed in the device.
A flowchart for programming the code memory of the
PIC24FJ64GA1/GB0 families is shown in Figure 4-4. In
this example, all 22K instruction words of a 64-Kbyte
device are programmed. First, the number of
commands to send (called ‘RemainingCmds’ in the
flowchart) is set to 344 and the destination address
(called ‘BaseAddress’) is set to ‘0’. Next, one write
block in the device is programmed with a PROGP
command. Each PROGP command contains data for
one row of code memory of the device. After the first
command is processed successfully, ‘RemainingCmds’
is decremented by 1 and compared with 0. Since there
are more PROGP commands to send, ‘BaseAddress’
is incremented by 80h to point to the next row of
memory.
On the second PROGP command, the second row is
programmed. This process is repeated until the entire
device is programmed. No special handling must be
performed when a panel boundary is crossed.
DS39934B-page 26
Blank Check
Code Memory Programming
PROGRAMMING METHODOLOGY
FIGURE 4-4:
4.5.2
After code memory is programmed, the contents of
memory can be verified to ensure that programming
was successful. Verification requires code memory to
be read back and compared against the copy held in
the programmer’s buffer.
The READP command can be used to read back all of
the programmed code memory.
Alternatively, you can have the programmer perform
the verification after the entire device is programmed
using a checksum computation.
BaseAddress + 80h
BaseAddress =
PROGRAMMING VERIFICATION
No
RemainingCmds = 344
Command to Program
RemainingCmds – 1
BaseAddress = 00h
RemainingCmds =
PROGP response
FLOWCHART FOR
PROGRAMMING CODE
MEMORY
RemainingCmds
Send PROGP
© 2009 Microchip Technology Inc.
BaseAddress
PASS?
Finish
Start
Are
0?
Is
Yes
Yes
Report Error
Failure
No