PIC18F4420T-I/PT Microchip Technology, PIC18F4420T-I/PT Datasheet - Page 29

• Manufacturer Part Number: PIC18F4420T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4420T-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 5-1:
 2010 Microchip Technology Inc.
300000h
300001h
300002h
300003h
300005h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh
3FFFFFh
Legend:
Note 1:
2:
3:
4:
5:
6:
7:
8:
9:
10: Implemented on PIC18F2685/4685 devices only.
File Name
(1,8)
- = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Implemented only on PIC18F2455/2550/4455/4550 and PIC18F2458/2553/4458/4553 devices.
Implemented on PIC18F2585/2680/4585/4680, PIC18F2682/2685 and PIC18F4682/4685 devices only.
Implemented on PIC18F2480/2580/4480/4580 devices only.
These bits are only implemented on specific devices based on available memory. Refer to
In PIC18F2480/2580/4480/4580 devices, this bit is read-only in Normal Execution mode; it can be written only in Program mode.
DEVID registers are read-only and cannot be programmed by the user.
Implemented on all devices with the exception of the PIC18FXX8X and PIC18F2450/4450 devices.
Implemented on PIC18F2450/4450 devices only.
Implemented on PIC18F2682/2685 and PIC18F4682/4685 devices only.
CONFIG1L
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3H
CONFIG4L
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
DEVID1
DEVID2
CONFIGURATION BITS AND DEVICE IDS
(6)
(6)
MCLRE
DEBUG
DEV10
WRTD
DEV2
IESO
Bit 7
CPD
—
—
—
—
—
—
—
FCMEN
EBTRB
XINST
WRTB
DEV1
DEV9
Bit 6
CPB
—
—
—
—
—
—
—
VREGEN
EBTR5
BBSIZ1
WRT5
ICPRT
ICPRT
WRTC
USBDIV
BBSIZ1
CP5
DEV0
DEV8
Bit 5
—
—
—
—
—
—
—
(10)
(10)
PIC18F2XXX/4XXX FAMILY
(10)
(1)
(8)
(5)
(2)
(1,8)
CPUDIV1
BBSIZ2
WDTPS3
EBTR4
BBSIZ
WRT4
BORV1
BBSIZ0
CP4
REV4
DEV7
Bit 4
—
—
—
—
—
—
—
(9)
(9)
(3)
(9)
(2)
CPUDIV0
EBTR3
WDTPS2
BBSIZ
WRT3
FOSC3
BORV0
CP3
REV3
DEV6
Bit 3
—
—
—
—
—
—
—
—
(4)
(4)
(8)
(4)
LPT1OSC
BOREN1
WDTPS1
EBTR2
PLLDIV2
WRT2
FOSC2
CP2
REV2
DEV5
Bit 2
LVP
—
—
—
(4)
(4)
(4)
Section 2.3 “Memory
WDTPS0
PLLDIV1
BOREN0
PBADEN
FOSC1
EBTR1
WRT1
REV1
DEV4
Bit 1
CP1
—
—
—
—
CCP2MX
PWRTEN
STVREN
PLLDIV0
WDTEN
FOSC0
EBTR0
WRT0
REV0
DEV3
Bit 0
CP0
—
—
—
—
Maps”.
(7)
DS39622L-page 29
Unprogrammed
--00 0000
00-- 0111
00-- 0101
---1 1111
--01 1111
---1 1111
1--- -011
1--- -01-
100- -1-1
1000 -1-1
10-0 -1-1
100- 01-1
1000 -1-1
--11 1111
11-- ----
--11 1111
111- ----
--11 1111
-1-- ----
See
See
Default/
Value
Table 5-2
Table 5-2
(1,8)
(1,8)
(7)
(1)
(3)
(8)
(2)