PIC18LF2410-I/ML Microchip Technology, PIC18LF2410-I/ML Datasheet - Page 300

• Manufacturer Part Number: PIC18LF2410-I/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2410-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2X1X/4X1X
23.2.2
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39636D-page 302
Q Cycle Activity:
Note:
Before Instruction
After Instruction
Decode
FSR2
FSR2
Q1
EXTENDED INSTRUCTION SET
All PIC18 instructions may take an optional label argument preceding the instruction mnemonic for use in
symbolic addressing. If a label is used, the instruction syntax then becomes: {label} instruction argument(s).
=
=
literal ‘k’
ADDFSR
Add Literal to FSR
ADDFSR f, k
0 ≤ k ≤ 63
f ∈ [ 0, 1, 2 ]
FSR(f) + k → FSR(f)
None
The 6-bit literal ‘k’ is added to the
contents of the FSR specified by ‘f’.
1
1
Read
1110
Q2
03FFh
0422h
2, 23h
1000
Process
Data
Q3
ffkk
Write to
FSR
kkkk
Q4
ADDULNK
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Operation
Decode
FSR2
PC
FSR2
PC
No
Q1
=
=
=
=
Operation
literal ‘k’
ADDULNK 23h
Add Literal to FSR2 and Return
ADDULNK k
0 ≤ k ≤ 63
FSR2 + k → FSR2,
(TOS) → PC
None
The 6-bit literal ‘k’ is added to the
contents of FSR2. A RETURN is then
executed by loading the PC with the
TOS.
The instruction takes two cycles to
execute; a NOP is performed during
the second cycle.
This may be thought of as a special
case of the ADDFSR instruction,
where f = 3 (binary ‘11’); it operates
only on FSR2.
1
2
Read
1110
No
Q2
03FFh
0100h
0422h
(TOS)
© 2009 Microchip Technology Inc.
1000
Operation
Process
Data
No
Q3
11kk
Operation
Write to
FSR
No
kkkk
Q4