JN5139/001,515 NXP Semiconductors, JN5139/001,515 Datasheet - Page 22

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JN5139/001,515

Manufacturer Part Number
JN5139/001,515
Description
IC MCU 32BIT 56QFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of JN5139/001,515

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.3 Hardware Interrupts
Hardware interrupts generated from the transceiver, analogue or digital peripherals and DIO pins are individually
masked using the Programmable Interrupt Controller (PIC). Management of interrupts is provided in the peripherals
library. Further details of interrupts are provided for the functions in their respective sections in this datasheet.
Interrupts are used to wake the JN5139 from sleep. The peripherals, baseband controller, security coprocessor and
PIC are powered down during sleep but the DIO interrupts and optionally the wake-up timers and analogue
comparator interrupts remain powered to bring the JN5139 out of sleep.
22
SPI Controller
Coprocessor
2-wire Serial
Peripheral
Peripheral
Baseband
Controller
Intelligent
Analogue
Wake-up
DIO Pins
Interface
Security
UART0
UART1
Timers
Timer0
Timer1
Figure 13: Programmable Interrupt Controller
JN-DS-JN5139 1v9
Programmable
Controller
Interrupt
Hardware
Interrupt
© NXP Laboratories UK 2010

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