JN5139/001,515 NXP Semiconductors, JN5139/001,515 Datasheet - Page 40

• Manufacturer Part Number: JN5139/001,515
• Description: IC MCU 32BIT 56QFN
• Manufacturer: NXP Semiconductors

Specifications of JN5139/001,515

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.2 Tick Timer
The JN5139 contains a hardware timer that can be used for generating timing interrupts to software. It may be used
to implement regular events such as ticks for software timers or an operating system, as a high-precision timing
reference or can be used to implement system monitor timeouts as used in a watchdog timer. Features include:
The Tick Timer is clocked from the 16MHz CPU clock, which is fed to a 32-bit wide resettable up-counter, gated by a
signal from the mode control block. A match register allows comparison between the counter and a programmed
value. The match value, measured in 16MHz clock cycles is programmed through software, in the range 0 to
0x0FFFFFFF. The output of the comparison can be used to generate an interrupt if the interrupt is enabled and used
in controlling the counter in the different modes. Upon configuring the timer mode, the counter is also reset.
If the mode is programmed as single shot, the counter begins to count from zero until the match value is reached.
The match signal will be generated which will cause an interrupt if enabled, and the counter will stop counting. The
counter is restarted by reprogramming the mode.
If the mode is programmed as restartable, the operation of the counter is the same as for the single shot mode,
except that when the match value is reached the counter is reset and begins counting from zero. An interrupt will be
generated when the match value is reached if it is enabled.
Continuous mode operation is similar to restartable, except that when the match value is reached, the counter is not
reset but continues to count. An interrupt will be generated when the match value is reached if enabled.
In CPU doze mode the tick timer is not clocked and therefore cannot be used as a wakeup source.
12.3 Wakeup Timers
Two 32-bit wakeup timers driven from the 32kHz system clock are available in the JN5139. They may run during
sleep periods when the majority of the rest of the device is powered down, to time sleep periods or other long period
timings that may be required by the application. The wakeup timers do not run during deep sleep and may optionally
be disabled in sleep mode through software control. When a wakeup timer expires it typically generates an interrupt,
40
•
•
•
•
32-bit counter
28-bit match value
Maskable timer interrupt
Single-shot, Restartable or Continuous modes of operation
SysClk
Run
&
Match Value
Counter
Control
Reset
Mode
Figure 32: Tick Timer
JN-DS-JN5139 1v9
Mode
=
Match
Enable
Int
&
© NXP Laboratories UK 2010
Tick Timer
Interrupt