JN5139/001,515 NXP Semiconductors, JN5139/001,515 Datasheet - Page 39

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JN5139/001,515

Manufacturer Part Number
JN5139/001,515
Description
IC MCU 32BIT 56QFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of JN5139/001,515

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12.1.5 Timer / Counter Application
Figure 31 shows an application of the JN5139 timers to provide closed loop speed control. Timer 0 is configured in
PWM mode to provide a variable mark-space ratio switching waveform to the gate of the NFET. This in turn controls
the power in the DC motor.
Timer 1 is configured to count the rising edge events on the clk/gate pin over a constant period. This converts the
tacho pulse stream output into a count proportional to the motor speed. This value is then used by the application
software executing the control algorithm.
© NXP Laboratories UK 2010
Timer 0
Timer 1
JN5139
Figure 31: Closed Loop PWM Speed Control Using JN5139 Timers
51
48
50
52
53
54
CLK/GATE
CAPTURE
CLK/GATE
CAPTURE
PWM
PWM
JN-DS-JN5139 1v9
1N4007
M
IRF521
1 pulse/rev
Tacho
+12V
39

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