JN5139/001,515 NXP Semiconductors, JN5139/001,515 Datasheet - Page 47

• Manufacturer Part Number: JN5139/001,515
• Description: IC MCU 32BIT 56QFN
• Manufacturer: NXP Semiconductors

Specifications of JN5139/001,515

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.1 Analogue to Digital Converter
The 12-bit analogue to digital converter (ADC) uses a successive approximation design to perform high accuracy
conversions as typically required in wireless sensor network applications. It has six multiplexed single-ended input
channels: four available externally, one connected to an internal temperature sensor, and one connected to an
internal supply monitoring circuit.
15.1.1 Operation
The input range of the ADC can be set between 0V to either the reference voltage or twice the reference voltage.
The reference can be either taken from the internal voltage reference or from the external voltage applied to the
VREF pin. For example, an external reference of 1.2V supplied to VREF may be used to set the ADC range between
0V and 2.4V.
The input clock to the ADC is 16MHz and can be divided down to 2MHz, 1MHz, 500kHz and 250kHz. During an ADC
conversion the selected input channel is sampled for a fixed period and then held. This sampling period is defined as
a number of ADC clock periods and can be programmed to 2, 4, 6 or 8. The conversion rate is ((3 x Sample period)
+ 14) clock periods. For example for 500KHz conversion with sample period of 2 will be (3 x 2) + 14 = 20 clock
periods, 40usecs or 25KHz. . The ADC can be operated in either a single conversion mode or alternatively a new
conversion can be started as soon as the previous one has completed, to give continuous conversions.
If the source resistance of the input voltage is 1kΩ or less, then the default sampling time of 2 clocks should be used.
The input to the ADC can be modelled as a resistor of 5kΩ(typ) and 10kΩ(max) to represent the on-resistance of the
switches and the sampling capacitor 8pF. The sampling time required can then be calculated, by adding the sensor
source resistance to the switch resistance, multiplying by the capacitance giving a time constant. Assuming normal
exponential RC charging, the number of time constants required to give an acceptable error can be calculated, 7 time
constants gives an error of 0.1%, so for 12-bit accuracy 10 time constants should be the target. For a source with
zero resistance, 10 time constants is 800 nsecs, hence the smallest sampling window of 2 clock periods can be used.
The ADC sampling period, input range and mode (single shot or continuous) are controlled through software.
When the ADC conversion is complete, an interrupt is generated. Alternatively the conversion status can be polled.
When operating in continuous mode, it is recommended that the interrupt is used to signal the end of a conversion,
since conversion times may range from 10 to 152 μsecs. Polling over this period would be wasteful of processor
bandwidth.
© NXP Laboratories UK 2010
VREF
1.2V
1.6V
1.2V
1.6V
Gain Setting
0
0
1
1
ADC
pin
Table 5 ADC Reference and Gain Settings
Figure 39 ADC Input Equivalent Circuit
Maximum Input Range
5 K
JN-DS-JN5139 1v9
Sample
Switch
1.2V
1.6V
2.4V
3.2V
8 pF
Supply Voltage Range (VDD)
ADC
front
end
2.2V - 3.6V
2.2V - 3.6V
2.6V - 3.6V
3.4V - 3.6V
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