AM29LV800DB-70ED Spansion Inc., AM29LV800DB-70ED Datasheet - Page 25

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AM29LV800DB-70ED

Manufacturer Part Number
AM29LV800DB-70ED
Description
Flash Memory IC
Manufacturer
Spansion Inc.
Series
AM29r

Specifications of AM29LV800DB-70ED

Memory Size
8Mbit
Package/case
48-TSOP
Supply Voltage Max
3V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Access Time, Tacc
70nS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29LV800DB-70ED
Manufacturer:
SPANSION
Quantity:
472
prior to this, the device outputs the “comple-
ment,” or “0.” The system must provide an
address within any of the sectors selected for
erasure to read valid status information on DQ7.
After an erase command sequence is written, if
all sectors selected for erasing are protected,
Data# Polling on DQ7 is active for approxi-
mately 100 µs, then the device returns to
reading array data. If not all selected sectors are
protected, the Embedded Erase algorithm
erases the unprotected sectors, and ignores the
selected sectors that are protected.
When the system detects DQ7 has changed
from the complement to true data, it can read
valid data at DQ7–DQ0 on the following read
cycles. This is because DQ7 may change asyn-
chronously with DQ0–DQ6 while Output Enable
(OE#) is asserted low. Figure 1, Data# Polling
Timings (During Embedded Algorithms), in the
“AC Characteristics” section illustrates this.
Table 6 shows the outputs for Data# Polling on
DQ7. Figure 1 shows the Data# Polling algo-
rithm.
January 21, 2005 Am29LV800D_00_A4_E
P R E L I M I N A R Y
Am29LV800D
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output
pin that indicates whether an Embedded Algo-
rithm is in progress or complete. The RY/BY#
status is valid after the rising edge of the final
WE# pulse in the command sequence. Since
RY/B Y# is an open -d rain outpu t, se veral
Notes:
1. VA = Valid address for programming. During a
2. DQ7 should be rechecked even if DQ5 = “1” be-
No
sector erase operation, a valid address is an
address within any sector selected for erasure.
During chip erase, a valid address is any
non-protected sector address.
cause DQ7 may change simultaneously with DQ5.
Figure 1. Data# Polling Algorithm
Read DQ7–DQ0
Read DQ7–DQ0
DQ7 = Data?
DQ7 = Data?
Addr = VA
Addr = VA
DQ5 = 1?
START
FAIL
No
Yes
No
Yes
Yes
PASS
23

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