CS61880-IQZ Cirrus Logic Inc, CS61880-IQZ Datasheet - Page 15

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CS61880-IQZ

Manufacturer Part Number
CS61880-IQZ
Description
IC Octal E1 Line Interface Unit
Manufacturer
Cirrus Logic Inc
Datasheet

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3.4 Cable Select
3.5
DS450PP3
Status
SYMBOL
SYMBOL
CBLSEL
LOS0
LOS1
LOS2
LOS3
LOS4
LOS5
LOS6
LOS7
LQFP
LQFP
106
140
113
93
42
35
75
68
3
FBGA
FBGA
G13
K12
E12
K11
E11
K4
K3
E3
E4
TYPE
TYPE
O
O
O
O
O
O
O
O
I
Cable Impedance Select
Host Mode - The input voltage to this pin does not effect
normal operation.
Hardware Mode - This pin is used to select the transmitted
pulse shape and set the line impedance for all eight receiv-
ers and transmitters. This pin also selects whether or not all
eight receivers use an internal or external line matching
network (Refer to the
NOTE: Refer to
Loss of Signal Output
The LOS output pins can be configured to indicate a loss of
signal (LOS) state that is compliant to either ITU G.775 or
ETSI 300 233. These pins are asserted “High” to indicate
LOS. The LOS output returns low when an input signal is
present for the time period dictated by the associated speci-
fication (Refer to
on page 27)).
No Connect
CBLSEL
HIGH
LOW
page 51
ponents. All transmitters use internal matching net-
works.
Table 4. Cable Impedance Selection
120
for appropriate external line matching com-
Transmitters
75
75
Loss-of-Signal (LOS)
Figure 16 on page 50
Table 4
DESCRIPTION
Internal
Internal
DESCRIPTION
Internal
below for proper settings).
120
75
Internal or External
(See Section 10.5
75
Receivers
and
External
Internal
CS61880
Figure 17 on
15

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