CS61880-IQZ Cirrus Logic Inc, CS61880-IQZ Datasheet - Page 55

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CS61880-IQZ

Manufacturer Part Number
CS61880-IQZ
Description
IC Octal E1 Line Interface Unit
Manufacturer
Cirrus Logic Inc
Datasheet

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19.5 Receiver Analog Characteristics
(TA = -40 C to 85 C; TV+, RV+ = 3.3 V 5%; GND = 0 V))
Notes: 10. Parameters guaranteed by design and characterization.
DS450PP3
Allowable Cable Attenuation @ 1024 kHz
RTIP/RRING Input Impedance
(Internal Line matching mode)
Note
RTIP/RRING Input Impedance
(External Line matching mode)
Note
Receiver Dynamic Range
Signal to Noise margin (Per G.703, O151 @ 6 dB cable Atten).
Receiver Squelch Level
LOS Threshold
LOS Hysteresis
Data Decision Threshold
Note
Input Jitter Tolerance
Notes 10, 14,
Input Return Loss
Notes 10, 11,
10
10
10
11. Using components on the CDB61880 evaluation board in Internal Match Impedance Mode.
12. Return loss = 20log10 ABS((Z1 + Z0) / (Z1 - Z0)) where Z1 - impedance of the transmitter or receiver,
13. Assuming that jitter free clock is input to TCLK.
14. Jitter tolerance for 6 dB input signal levels. Jitter tolerance increases at lower frequencies. HDB3 coders
15. In Data Recovery Mode.
16. Jitter Attenuator in the receive path.
and Z0 = cable impedance.
enabled.
12
16
Parameter
2048 kHz - 3072 kHz
102 kHz - 2048 kHz
18 kHz - 100 kHz
51 kHz - 102 kHz
20 Hz - 2.4 kHz
E1 120
E1 120
E1 75
E1 75
1 Hz - 1.8 Hz
Load
Load
Load
Load
Min.
-18
-18
-18
0.5
1.5
0.2
41
18
-
-
-
-
-
-
-
Typ
150
200
13k
13k
13k
-18
-28
-30
-27
50
50
50
-
-
-
-
-
Max
- 12
59
-
-
-
-
-
-
-
-
-
-
-
-
-
CS61880
Units
peak
% of
mV
mV
mV
dB
Vp
dB
dB
UI
55

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