MT48LC16M16A2P-75 IT:D Micron Technology Inc, MT48LC16M16A2P-75 IT:D Datasheet - Page 86

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MT48LC16M16A2P-75 IT:D

Manufacturer Part Number
MT48LC16M16A2P-75 IT:D
Description
DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC16M16A2P-75 IT:D

Density
256 Mb
Maximum Clock Rate
133 MHz
Package
54TSOP-II
Address Bus Width
15 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
6|5.4 ns
Operating Temperature
-40 to 85 °C
Organization
16Mx16
Address Bus
15b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Figure 55: Clock Suspend During READ Burst
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Command
Note:
Internal
Address
clock
CKE
CLK
DQ
1. For this example, CL = 2, BL = 4 or greater, and DQM is LOW.
T0
READ
Bank,
Col n
T1
NOP
T2
NOP
D
OUT
86
T3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
D
OUT
T4
NOP
T5
NOP
256Mb: x4, x8, x16 SDRAM
D
OUT
T6
Don’t Care
NOP
D
© 1999 Micron Technology, Inc. All rights reserved.
OUT
Clock Suspend

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