NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 12

• Manufacturer Part Number: NH82801DB S L8DE
• Manufacturer: Intel

Specifications of NH82801DB S L8DE

• Lead Free Status / RoHS Status: Compliant

10
12
9.5
9.6
9.7
9.8
9.9
9.10
IDE Controller Registers (D31:F1)
10.1
9.4.10 ELCR2—Slave Controller Edge/Level Triggered Register ............. 330
Advanced Interrupt Controller (APIC) .......................................................... 331
9.5.1
9.5.2
9.5.3
9.5.4
9.5.5
9.5.6
9.5.7
9.5.8
9.5.9
9.5.10 Redirection Table............................................................................ 335
Real Time Clock Registers .......................................................................... 337
9.6.1
9.6.2
Processor Interface Registers ..................................................................... 342
9.7.1
9.7.2
9.7.3
9.7.4
9.7.5
Power Management Registers (D31:F0) ..................................................... 345
9.8.1
9.8.2
9.8.3
System Management TCO Registers (D31:F0) ........................................... 371
9.9.1
9.9.2
9.9.3
9.9.4
9.9.5
9.9.6
9.9.7
9.9.8
9.9.9
9.9.10 TCO_WDSTATUS—TCO2 Control Register .................................. 377
9.9.11 SW_IRQ_GEN—Software IRQ Generation Register...................... 377
General Purpose I/O Registers (D31:F0) .................................................... 378
9.10.1 GPIO_USE_SEL—GPIO Use Select Register ............................... 378
9.10.2 GP_IO_SEL—GPIO Input/Output Select Register ......................... 379
9.10.3 GP_LVL—GPIO Level for Input or Output Register........................ 379
9.10.4 GPO_BLINK—GPO Blink Enable Register..................................... 380
9.10.5 GPI_INV—GPIO Signal Invert Register.......................................... 381
9.10.6 GPIO_USE_SEL2—GPIO Use Select 2 Register .......................... 381
9.10.7 GP_IO_SEL2—GPIO Input/Output Select 2 Register .................... 382
9.10.8 GP_LVL2—GPIO Level for Input or Output 2 Register................... 382
PCI Configuration Registers (IDE—D31:F1) ............................................... 383
10.1.1 VID—Vendor ID Register (LPC I/F—D31:F1)................................. 384
10.1.2 DID—Device ID Register (LPC I/F—D31:F1) ................................. 384
10.1.3 CMD — Command Register (IDE—D31:F1) .................................. 384
APIC Register Map ......................................................................... 331
IND—Index Register ....................................................................... 332
DAT—Data Register ....................................................................... 332
IRQPA—IRQ Pin Assertion Register .............................................. 332
EOIR—EOI Register ....................................................................... 333
ID—Identification Register .............................................................. 333
VER—Version Register .................................................................. 334
ARBID—Arbitration ID Register ...................................................... 334
BOOT_CONFIG—Boot Configuration Register .............................. 334
I/O Register Address Map .............................................................. 337
Indexed Registers ........................................................................... 338
NMI_SC—NMI Status and Control Register ................................... 342
NMI_EN—NMI Enable (and Real Time Clock Index) Register ....... 343
PORT92—Fast A20 and Init Register............................................. 343
COPROC_ERR—Coprocessor Error Register ............................... 343
RST_CNT—Reset Control Register ............................................... 344
Power Management PCI Configuration Registers (D31:F0) ........... 345
APM I/O Decode ............................................................................. 352
Power Management I/O Registers.................................................. 353
TCO1_RLD—TCO Timer Reload and Current Value Register....... 371
TCO1_TMR—TCO Timer Initial Value Register ............................. 372
TCO1_DAT_IN—TCO Data In Register ......................................... 372
TCO1_DAT_OUT—TCO Data Out Register................................... 372
TCO1_STS—TCO1 Status Register............................................... 373
TCO2_STS—TCO2 Status Register............................................... 374
TCO1_CNT—TCO1 Control Register............................................. 375
TCO2_CNT—TCO2 Control Register............................................. 376
TCO_MESSAGE1 and TCO_MESSAGE2 Registers ..................... 376
............................................................. 383
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82801DB ICH4 Datasheet