ISP1161A1BMUM STEricsson, ISP1161A1BMUM Datasheet - Page 53

• Manufacturer Part Number: ISP1161A1BMUM
• Manufacturer: STEricsson

Specifications of ISP1161A1BMUM

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
Table 20:
9397 750 13961
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcFmInterval register: bit allocation
R/W
R/W
FIT
31
23
15
0
0
7
10.2.1 HcFmInterval register (R/W: 0DH/8DH)
10.2 HC frame counter registers
reserved
Table 19:
The HcFmInterval register contains a 14-bit value which indicates the bit time interval
in a frame (that is, between two consecutive SOFs), and a 15-bit value indicating the
full-speed maximum packet size that the HC may transmit or receive without causing
a scheduling overrun. The HCD may carry out minor adjustments on the
FrameInterval by writing a new value at each SOF. This allows the HC to synchronize
with an external clock source and to adjust any unknown clock offset.
Code (Hex): 0D — read
Code (Hex): 8D — write
Bit
5
4
3
2
1
0
R/W
R/W
30
22
14
0
0
6
HcInterruptDisable register: bit description
Symbol
FNO
UE
RD
SF
-
SO
R/W
R/W
29
21
13
0
1
5
Rev. 03 — 23 December 2004
Description
0 — ignore
1 — disable interrupt generation due to Frame Number Overflow
0 — ignore
1 — disable interrupt generation due to Unrecoverable Error
0 — ignore
1 — disable interrupt generation due to Resume Detect
0 — ignore
1 — disable interrupt generation due to Start of Frame
reserved
0 — ignore
1 — disable interrupt generation due to Scheduling Overrun
R/W
R/W
28
20
12
0
0
4
FSMPS[7:0]
FI[7:0]
DFH
R/W
R/W
00H
FSMPS[14:8]
USB single-chip host and device controller
R/W
R/W
27
19
11
0
1
3
FI[13:8]
R/W
R/W
…continued
26
18
10
0
1
2
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1161A1
R/W
R/W
25
17
0
9
1
1
R/W
R/W
52 of 136
24
16
0
8
0
0