AD9514BCPZ Analog Devices Inc, AD9514BCPZ Datasheet - Page 21

• Manufacturer Part Number: AD9514BCPZ
• Description: IC CLOCK DIST 3OUT PLL 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Fanout Buffer (Distribution), Dividerr

Specifications of AD9514BCPZ

• Number Of Circuits: 1
• Ratio - Input:output: 1:3
• Differential - Input:output: Yes/Yes
• Input: Differential
• Output: CMOS, LVDS, LVPECL
• Frequency - Max: 1.6GHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Frequency-max: 1.6GHz
• No. Of Multipliers / Dividers: 3
• No. Of Amplifiers: 4
• Supply Voltage Range: 3.135V To 3.465V
• Slew Rate: 1V/ns
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9514/PCBZ - BOARD EVAL CLOCK 3CH AD9514
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 13. S5, S6—OUT2 Divide or OUT1 Phase
S5
0
1/3
2/3
1
0
1/3
2/3
1
0
1/3
2/3
1
0
1/3
2/3
1
1
Table 14. S7, S8—OUT1 Divide or OUT2 Phase
S7
0
1/3
2/3
1
0
1/3
2/3
1
0
1/3
2/3
1
0
1/3
2/3
1
1
Duty cycle is the clock signal high time divided by the total period.
Duty cycle is the clock signal high time divided by the total period.
S8
0
0
0
0
1/3
1/3
1/3
1/3
2/3
2/3
2/3
2/3
1
1
1
1
S6
0
0
0
0
1/3
1/3
1/3
1/3
2/3
2/3
2/3
2/3
1
1
1
1
S2 ≠ 1
OUT1
Divide (Duty Cycle
1
4 (50%)
18 (50%)
32 (50%)
2 (50%)
3 (33%)
5 (40%)
6 (50%)
8 (50%)
9 (44%)
10 (50%)
12 (50%)
15 (47%)
16 (50%)
24 (50%)
30 (50%)
S2 ≠ 0
OUT2
Divide (Duty Cycle
1
2 (50%)
3 (33%)
4 (50%)
5 (40%)
6 (50%)
8 (50%)
9 (44%)
10 (50%)
12 (50%)
15 (47%)
16 (50%)
18 (50%)
24 (50%)
30 (50%)
32 (50%)
1
)
1
)
OUT2
Phase
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
S2 = 1 and S0 ≠ 0
S2 = 0
OUT1
Phase
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Rev. 0 | Page 21 of 28
Table 15. S9, S10—OUT0 Divide or OUT2 Divide
S9
0
1/3
2/3
1
0
1/3
2/3
1
0
1/3
2/3
1
0
1/3
2/3
1
1
Duty cycle is the clock signal high time divided by the total period.
S10
0
0
0
0
1/3
1/3
1/3
1/3
2/3
2/3
2/3
2/3
1
1
1
1
S2 ≠ 2/3
OUT0
Divide (Duty Cycle
1
2 (50%)
3 (33%)
4 (50%)
5 (40%)
6 (50%)
8 (50%)
9 (44%)
10 (50%)
12 (50%)
15 (47%)
16 (50%)
18 (50%)
24 (50%)
30 (50%)
32 (50%)
1
)
S2 = 2/3
OUT2
Divide (Duty Cycle
7 (43%)
11 (45%)
13 (46%)
14 (50%)
17 (47%)
19 (47%)
20 (50%)
21 (48%)
22 (50%)
23 (48%)
25 (48%)
26 (50%)
27 (48%)
28 (50%)
29 (48%)
31 (48%)
AD9514
1
)