MK2049-45ASITR IDT, Integrated Device Technology Inc, MK2049-45ASITR Datasheet
MK2049-45ASITR
Specifications of MK2049-45ASITR
Related parts for MK2049-45ASITR
MK2049-45ASITR Summary of contents
Page 1
... Buffer Mode accepts MHz input and will provide a jitter attenuated output at 0.5 x ICLK ICLK ICLK. In this mode the MK2049-45A is ideal for filtering jitter from high frequency clocks. In External Mode, ICLK accepts an 8 kHz clock and will produce output frequencies from a table of common communciations clock rates, CLK and CLK/2 ...
Page 2
... Input clock connection. Connect to 8 kHz backplane or MHz clock. Power Connect to ground. Power Power Supply. Connect to +3.3 V. Loop Connect the loop filter capacitors and resistor between this pin and CAP2. Filter Power Connect to ground. 2 VCXO AND SYNTHESIZER Pin Description MK2049-45A REV C 051310 ...
Page 3
... Please refer to the Output Clock Selection Table on Page 2. Most typical PLL clock devices use an internal VCO (Voltage Controlled Oscillator) for output clock generation. By using a VCXO with an external crystal, the MK2049-45A is able to 3 VCXO AND SYNTHESIZER Pin Description Crystal ...
Page 4
... Please refer to the Quartz Crystal section on this page regarding external crystal requirements. Quartz Crystal It is important that the correct type of quartz crystal is used with the MK2049-45A. Failure may result in reduced frequency pullability range, inability of the loop to lock, or excessive output phase jitter. The MK2049-45A operates by phase-locking the VCXO circuit to the input signal of the selected ICLK input ...
Page 5
... VDD and the PCB ground plane. To further guard against interfering system supply noise, the MK2049-45A should use one common connection to the PCB power plane as shown in the diagram on the next page. The ferrite bead and bulk capacitor help reduce lower frequency noise in the supply that can lead to output clock phase modulation ...
Page 6
... Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK2049-45A. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied ...
Page 7
... MHz t Referenced to jf Mitel/Zarlink MT9045, Note 3 7 VCXO AND SYNTHESIZER Min. Typ. Max. Units 3.15 3.3 3. 0.8 V -10 +10 A -10 + VDD-0.4 V 2.4 V 0.4 V ± VDD V Min. Typ. Max. Units -115 +115 ppm 0 1 400 ps MK2049-45A REV C 051310 ...
Page 8
... If controlled input to output skew is desired for this output clock frequency please refer to the MK2049 or MK2069 products. Note 3: Input reference is the 8 kHz output from a Mitel/Zarlink MT9045 device in freerun mode (SEL2:0 = 100, 19 ...
Page 9
... Basic 0.050 Basic 10.00 10.65 0.394 0.419 0.25 0.75 0.010 0.029 0.40 1.27 0.016 0.050 Package Temperature 20-pin SOIC -40 to +85 C 20-pin SOIC -40 to +85 C MK2049-45A -- 8 REV C 051310 ...
Page 10
... MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc ...