IDT82V3280PFG IDT, Integrated Device Technology Inc, IDT82V3280PFG Datasheet - Page 82

• Manufacturer Part Number: IDT82V3280PFG
• Description: IC PLL WAN SE STRATUM 2 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3280PFG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: 622.08MHz
• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: TQFP
• Pin Count: 100
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3280PFG

IN5_IN6_HF_DIV_CNFG - Input Clock 5 & 6 High Frequency Divider Configuration
Programming Information
IDT82V3280
Address: 18H
Type: Read / Write
Default Value: 00XXXX00
7 - 6
5 - 2
1 - 0
IN6_DIV1
Bit
7
IN6_DIV[1:0]
IN5_DIV[1:0]
IN6_DIV0
Name
-
6
These bits determine whether the HF Divider is used and what the division factor is for IN6 frequency division:
00: Bypassed. (default)
01: Divided by 4.
10: Divided by 5.
11: Reserved.
Reserved.
These bits determine whether the HF Divider is used and what the division factor is for IN5 frequency division:
00: Bypassed. (default)
01: Divided by 4.
10: Divided by 5.
11: Reserved.
5
-
4
-
82
3
-
Description
2
-
IN5_DIV1
1
December 9, 2008
IN5_DIV0
0
WAN PLL