MT47H128M8HQ-187E:E Micron Technology Inc, MT47H128M8HQ-187E:E Datasheet - Page 27

• Manufacturer Part Number: MT47H128M8HQ-187E:E
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H128M8HQ-187E:E

• Organization: 128Mx8
• Density: 1Gb
• Address Bus: 17b
• Access Time (max): 350ps
• Maximum Clock Rate: 1.066GHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 210mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Idd7 Conditions
Table 9: Idd7 Timing Patterns (8-Bank Interleave READ Operation)
PDF: 09005aef821ae8bf
Rev. O 9/08 EN
Timing patterns for 8-bank x4/x8 devices
Timing patterns for 8-bank x16 devices
Speed
Grade
-187E
-187E
-37E
-25E
-37E
-25E
-5E
-3E
-25
-5E
-3E
-25
-3
-3
Idd7 Timing Patterns
A0 RA0 A1 RA1 A2 RA2 A3 RA3 A4 RA4 A5 RA5 A6 RA6 A7 RA7
A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D A4 RA4 A5 RA5 A6 RA6 A7 RA7 D D
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D A4 RA4 D A5 RA5 D A6 RA6 D A7 RA7 D D
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D A4 RA4 D A5 RA5 D A6 RA6 D A7 RA7 D D
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D A4 RA4 D A5 RA5 D A6 RA6 D A7 RA7 D D D
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D A4 RA4 D A5 RA5 D A6 RA6 D A7 RA7 D D D
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D D D
D
A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D A4 RA4 A5 RA5 A6 RA6 A7 RA7 D D
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D A4 RA4 D A5 RA5 D A6 RA6 D A7 RA7 D D D
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D D
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D D
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D D D
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D D D
A0 RA0 D D D D A1 RA1 D D D D A2 RA2 D D D D A3 RA3 D D D D A4 RA4 D D D D A5 RA5 D D D D A6 RA6 D
D D D A7 RA7 D D D D
Notes:
The detailed timings are shown below for Idd7. Where general Idd parameters in
Table 8 (page 26) conflict with pattern requirements of Table 9 (page 27), then Table 9
(page 27) requirements take precedence.
1. A = active; RA = read auto precharge; D = deselect.
2. All banks are being interleaved at
3. Control and address bus inputs are stable during deselects.
27
Electrical Specifications – Idd Parameters
t
RC (Idd) without violating
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb: x4, x8, x16 DDR2 SDRAM
© 2004 Micron Technology, Inc. All rights reserved.
t
RRD (Idd) using a BL = 4.