MT47H128M8HQ-187E:E Micron Technology Inc, MT47H128M8HQ-187E:E Datasheet - Page 8

• Manufacturer Part Number: MT47H128M8HQ-187E:E
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H128M8HQ-187E:E

• Organization: 128Mx8
• Density: 1Gb
• Address Bus: 17b
• Access Time (max): 350ps
• Maximum Clock Rate: 1.066GHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 210mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

1Gb: x4, x8, x16 DDR2 SDRAM
Figure 51: Bank Read – Without Auto Precharge ............................................................................................ 101
Figure 52: Bank Read – with Auto Precharge .................................................................................................. 102
t
t
Figure 53: x4, x8 Data Output Timing –
DQSQ,
QH, and Data Valid Window ................................................. 103
t
t
Figure 54: x16 Data Output Timing –
DQSQ,
QH, and Data Valid Window ..................................................... 104
t
t
Figure 55: Data Output Timing –
AC and
DQSCK ......................................................................................... 105
Figure 56: Write Burst ................................................................................................................................... 107
Figure 57: Consecutive WRITE-to-WRITE ...................................................................................................... 108
Figure 58: Nonconsecutive WRITE-to-WRITE ................................................................................................ 108
Figure 59: WRITE Interrupted by WRITE ....................................................................................................... 109
Figure 60: WRITE-to-READ ........................................................................................................................... 110
Figure 61: WRITE-to-PRECHARGE ................................................................................................................ 111
Figure 62: Bank Write – Without Auto Precharge ............................................................................................ 112
Figure 63: Bank Write – with Auto Precharge ................................................................................................. 113
Figure 64: WRITE – DM Operation ................................................................................................................ 114
Figure 65: Data Input Timing ........................................................................................................................ 115
Figure 66: Refresh Mode ............................................................................................................................... 116
Figure 67: Self Refresh .................................................................................................................................. 118
Figure 68: Power-Down ................................................................................................................................ 120
Figure 69: READ-to-Power-Down or Self Refresh Entry .................................................................................. 122
Figure 70: READ with Auto Precharge-to-Power-Down or Self Refresh Entry .................................................. 122
Figure 71: WRITE-to-Power-Down or Self Refresh Entry ................................................................................ 123
Figure 72: WRITE with Auto Precharge-to-Power-Down or Self Refresh Entry ................................................. 123
Figure 73: REFRESH Command-to-Power-Down Entry ................................................................................. 124
Figure 74: ACTIVATE Command-to-Power-Down Entry ................................................................................ 124
Figure 75: PRECHARGE Command-to-Power-Down Entry ............................................................................ 125
Figure 76: LOAD MODE Command-to-Power-Down Entry ............................................................................ 125
Figure 77: Input Clock Frequency Change During Precharge Power-Down Mode ........................................... 126
Figure 78: RESET Function ........................................................................................................................... 128
Figure 79: ODT Timing for Entering and Exiting Power-Down Mode .............................................................. 130
Figure 80: Timing for MRS Command to ODT Update Delay .......................................................................... 131
Figure 81: ODT Timing for Active or Fast-Exit Power-Down Mode ................................................................. 131
Figure 82: ODT Timing for Slow-Exit or Precharge Power-Down Modes ......................................................... 132
Figure 83: ODT Turn-Off Timings When Entering Power-Down Mode ............................................................ 132
Figure 84: ODT Turn-On Timing When Entering Power-Down Mode ............................................................. 133
Figure 85: ODT Turn-Off Timing When Exiting Power-Down Mode ............................................................... 134
Figure 86: ODT Turn-On Timing When Exiting Power-Down Mode ................................................................ 135
8
PDF: 09005aef821ae8bf
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Rev. O 9/08 EN
© 2004 Micron Technology, Inc. All rights reserved.