XC3SD1800A-4CS484I Xilinx Inc, XC3SD1800A-4CS484I Datasheet - Page 11

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XC3SD1800A-4CS484I

Manufacturer Part Number
XC3SD1800A-4CS484I
Description
FPGA Spartan®-3A Family 1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 484-Pin LCSBGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC3SD1800A-4CS484I

Package
484LCSBGA
Family Name
Spartan®-3A
Device Logic Units
37440
Device System Gates
1800000
Maximum Internal Frequency
667 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
309
Ram Bits
1548288

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0
General Recommended Operating Conditions
Table 7: General Recommended Operating Conditions
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
2.
3.
4.
5.
This V
range specific to each of the single-ended I/O standards, and
Define V
See XAPP459, Eliminating I/O Coupling Effects when Interfacing Large-Swing Single-Ended Signals to User I/O Pins on Spartan-3 Families.
For single-ended signals that are placed on a differential-capable I/O, V
between the two pins. See Parasitic Leakage in UG331, Spartan-3 Generation FPGA User Guide.
Measured between 10% and 90% V
Symbol
V
V
V
V
CCO
CCAUX
CCINT
T
IN
T
CCO
IN
J
(3)
(1)
CCAUX
range spans the lowest and highest operating voltages for all supported I/O standards.
selection using CONFIG VCCAUX constraint.
Junction temperature
Internal supply voltage
Output driver supply voltage
Auxiliary supply voltage
Input voltage
Input signal transition time
CCO
. Follow
(2)
Description
(5)
Signal Integrity
Commercial
Industrial
V
V
PCI™ IOSTANDARD
All other
IOSTANDARDs
CCAUX
CCAUX
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
= 2.5
= 3.3
www.xilinx.com
Table 12
recommendations.
lists that specific to the differential standards.
IN
IP or IO_#
IO_Lxxy_#
of –0.2V to –0.5V is supported but can cause increased leakage
(4)
1.14
1.10
2.25
3.00
–0.5
–0.5
–0.5
Min
–40
0
Table 10
Nominal
1.20
2.50
3.30
lists the recommended V
V
CCO
Max
1.26
3.60
2.75
3.60
4.10
4.10
100
500
85
+0.5
Units
CCO
°C
°C
ns
V
V
V
V
V
V
V
11

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