XC3SD1800A-4CS484I Xilinx Inc, XC3SD1800A-4CS484I Datasheet - Page 17

• Manufacturer Part Number: XC3SD1800A-4CS484I
• Description: FPGA Spartan®-3A Family 1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 484-Pin LCSBGA
• Manufacturer: Xilinx Inc

Specifications of XC3SD1800A-4CS484I

• Package: 484LCSBGA
• Family Name: Spartan®-3A
• Device Logic Units: 37440
• Device System Gates: 1800000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 309
• Ram Bits: 1548288

Differential Output Pairs
X-Ref Target - Figure 4
Table 13: DC Characteristics of User I/Os Using Differential Signal Standards
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
2.
3.
4.
IOSTANDARD Attribute
LVDS_25
LVDS_33
BLVDS_25
MINI_LVDS_25
MINI_LVDS_33
RSDS_25
RSDS_33
TMDS_33
PPDS_25
PPDS_33
DIFF_HSTL_I_18
DIFF_HSTL_II_18
DIFF_HSTL_III_18
DIFF_HSTL_I
DIFF_HSTL_III
DIFF_SSTL18_I
DIFF_SSTL18_II
DIFF_SSTL2_I
DIFF_SSTL2_II
DIFF_SSTL3_I
DIFF_SSTL3_II
The numbers in this table are based on the conditions set forth in
See
Output voltage measurements for all differential standards are made with a termination resistor (R
At any given time, no more than two of the following differential output standards can be assigned to an I/O bank: LVDS_25, RSDS_25, MINI_LVDS_25, PPDS_25 when
V
CCO
"External Termination Requirements for Differential I/O."
=2.5V, or LVDS_33, RSDS_33, MINI_LVDS_33, TMDS_33, PPDS_33 when V
Min (mV)
247
247
240
300
300
100
100
400
100
100
Internal
GND level
–
–
–
–
–
–
–
–
–
–
–
Logic
V
V
OUTN
OUTP
Typ (mV)
V
350
350
350
OD
V
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
OCM
V
V
Figure 4: Differential Output Voltages
V
OD
OH
OL
50%
= Output common mode voltage =
= Output differential voltage =
= Output voltage indicating a High logic level
= Output voltage indicating a Low logic level
Max (mV)
454
454
460
600
600
400
400
800
400
400
Table 7
–
–
–
–
–
–
–
–
–
–
–
V
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
OCM
www.xilinx.com
and
V
Table
CCO
Min (V)
1.125
1.125
CCO
1.0
1.0
1.0
1.0
0.5
0.5
12.
– 0.405
–
–
–
–
–
–
–
–
–
–
–
–
V
= 3.3V
V
OUTP
V
OD
OUTN
T
Typ (V)
) of 100Ω across the N and P pins of the differential signal pair.
V
V
1.30
V
0.8
0.8
OUTP
OCM
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
OH
P
N
V
OUTP
- V
V
OUTN
Differential
I/O Pair Pins
2
DS312-3_03_090510
+ V
CCO
Max (V)
1.375
1.375
V
OUTN
1.4
1.4
1.4
1.4
1.4
1.4
OL
– 0.190
–
–
–
–
–
–
–
–
–
–
–
–
V
V
V
V
V
V
V
V
V
TT
TT
V
V
CCO
CCO
CCO
CCO
CCO
Min (V)
TT
TT
TT
TT
V
+ 0.475
+ 0.603
+ 0.61
+ 0.81
OH
–
–
–
–
–
–
–
–
–
–
+ 0.6
+ 0.8
– 0.4
– 0.4
– 0.4
– 0.4
– 0.4
V
V
V
V
TT
TT
V
V
Max (V)
TT
TT
TT
TT
V
0.4
0.4
0.4
0.4
0.4
– 0.475
– 0.603
– 0.61
– 0.81
–
–
–
–
–
–
–
–
–
–
OL
- 0.6
- 0.8
17