AD5383BST-3 Analog Devices Inc, AD5383BST-3 Datasheet - Page 14

• Manufacturer Part Number: AD5383BST-3
• Description: IC DAC 12BIT 32CH 3V 100-LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD5383BST-3

• Design Resources: 32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5383 (CN0014) AD5383 Channel Monitor Function (CN0015)
• Settling Time: 6µs
• Number Of Bits: 12
• Data Interface: Serial, Parallel
• Number Of Converters: 32
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 39mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD5383
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 10. Pin Function Descriptions
Mnemonic
V
SIGNAL_GND(1 to 4)
DAC_GND(1 to 4)
AGND(1 to 4)
AV
DGND
DV
REF GND
REFOUT/REFIN
OUT
DD
DD
x
(1 to 4)
Function
Buffered Analog Outputs for Channel x. Each analog output is driven by a rail-to-rail output amplifier operating at a
gain of 2. Each output is capable of driving an output load of 5 kΩ to ground. Typical output impedance is 0.5 Ω.
Analog Ground Reference Points for Each Group of Eight Output Channels. All SIGNAL_GND pins are tied together
internally and should be connected to the AGND plane as close as possible to the AD5383.
Each Group of Eight Channels Contains a DAC_GND Pin. This is the ground reference point for the internal 12-bit
DAC. These pins shound be connected to the AGND plane.
Analog Ground Reference Point. Each group of eight channels contains an AGND pin. All AGND pins should be
connected externally to the AGND plane.
Analog Supply Pins. Each group of eight channels has a separate AV
internally and should be decoupled with a 0.1 μF ceramic capacitor and a 10 μF tantalum capacitor. Operating
range for the AD5383-5 is 4.5 V to 5.5 V; operating range for the AD5383-3 is 2.7 V to 3.6 V.
Ground for All Digital Circuitry.
Logic Power Supply. Guaranteed operating range is 2.7 V to 5.5 V. It is recommended that these pins be decoupled
with 0.1 μF ceramic and 10 μF tantalum capacitors to DGND.
Ground Reference Point for the Internal Reference.
The AD5383 Contains a Common REFOUT/REFIN Pin. When the internal reference is selected, this pin is the
reference output. If the application requires an external reference, it can be applied to this pin and the internal
reference can be disabled via the control register. The default for this pin is a reference input.
REFOUT/REFIN
SIGNAL_GND4
SIGNAL_GND1
DAC_GND4
DAC_GND1
REF GND
FIFO EN
V
V
V
V
V
V
V
V
AGND4
AGND1
AV
AV
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
CLR
DD
DD
27
24
25
26
28
29
30
31
4
1
0
1
2
3
4
10
11
13
14
15
16
17
18
19
20
22
23
24
25
12
21
1
2
3
4
5
6
7
8
9
PIN 1
IDENTIFIER
Figure 8. 100-Lead LQFP Pin Configuration
Rev. B | Page 14 of 40
(Not to Scale)
AD5383
TOP VIEW
DD
pin. These pins are connected together
75
74
73
72
70
69
68
67
66
65
64
63
61
60
59
58
57
56
55
54
53
51
71
62
52
RESET
DB5
DB4
DB3
DB2
DB1
DB0
NC
NC
REG0
REG1
V
V
V
V
AV
AGND3
DAC_GND3
SIGNAL_GND3
V
V
V
V
AV
AGND2
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DD
DD
20
17
23
22
21
19
18
16
3
2