EPM7256AETC100-5N Altera, EPM7256AETC100-5N Datasheet - Page 4

• Manufacturer Part Number: EPM7256AETC100-5N
• Description: IC MAX 7000 CPLD 256 100-TQFP
• Manufacturer: Altera
• Series: MAX® 7000Ar

Specifications of EPM7256AETC100-5N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 5.5ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Logic Elements/blocks: 16
• Number Of Macrocells: 256
• Number Of Gates: 5000
• Number Of I /o: 84
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Voltage: 3.3V
• Memory Type: EEPROM
• Number Of Logic Elements/cells: 16
• Family Name: MAX 7000A
• # Macrocells: 256
• Number Of Usable Gates: 5000
• Frequency (max): 250MHz
• Propagation Delay Time: 5.5ns
• Number Of Logic Blocks/elements: 16
• # I/os (max): 84
• Operating Supply Voltage (typ): 3.3V
• In System Programmable: Yes
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

MAX 7000A Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
(3)
4
Table 3. MAX 7000A Maximum User I/O Pins
EPM7032AE
EPM7064AE
EPM7128A
EPM7128AE
EPM7256A
EPM7256AE
EPM7512AE
Table 4. MAX 7000A Maximum User I/O Pins
EPM7032AE
EPM7064AE
EPM7128A
EPM7128AE
EPM7256A
EPM7256AE
EPM7512AE
When the IEEE Std. 1149.1 (JTAG) interface is used for in-system programming or boundary-scan testing, four I/O
pins become JTAG pins.
All Ultra FineLine BGA packages are footprint-compatible via the SameFrame
design a board to support a variety of devices, providing a flexible migration path across densities and pin counts.
Device migration is fully supported by Altera development tools. See
details.
All FineLine BGA packages are footprint-compatible via the SameFrame feature. Therefore, designers can design a
board to support a variety of devices, providing a flexible migration path across densities and pin counts. Device
migration is fully supported by Altera development tools. See
Device
Device
44-Pin PLCC 44-Pin TQFP 49-Pin Ultra
144-Pin TQFP
36
36
100
100
120
120
120
The MAX 7000A architecture supports 100% transistor-to-transistor logic
(TTL) emulation and high-density integration of SSI, MSI, and LSI logic
functions. It easily integrates multiple devices including PALs, GALs, and
22V10s devices. MAX 7000A devices are available in a wide range of
packages, including PLCC, BGA, FineLine BGA, Ultra FineLine BGA,
PQFP, and TQFP packages. See
FineLine BGA
169-Pin Ultra
36
36
100
Note (1)
Note (1)
FineLine
BGA
(2)
41
(2)
208-Pin PQFP 256-Pin BGA
“SameFrame Pin-Outs” on page 15
164
164
176
Table 3
84-Pin PLCC
“SameFrame Pin-Outs” on page 15
68
68
and
TM
Table
feature. Therefore, designers can
212
100-Pin
4.
TQFP
68
84
84
84
84
Altera Corporation
256-Pin FineLine
for more details.
BGA
FineLine
100
100
164
164
212
100-Pin
BGA
(3)
68
84
84
84
for more
(3)