EP1AGX20CF484C6N Altera, EP1AGX20CF484C6N Datasheet - Page 42

• Manufacturer Part Number: EP1AGX20CF484C6N
• Description: IC ARRIA GX FPGA 20K 484FBGA
• Manufacturer: Altera
• Series: Arria GXr

Specifications of EP1AGX20CF484C6N

• Number Of Logic Elements/cells: 21580
• Number Of Labs/clbs: 1079
• Total Ram Bits: 1229184
• Number Of I /o: 230
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Arria™ GX
• Number Of Logic Blocks/elements: 21580
• # I/os (max): 230
• Process Technology: CMOS
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 21580
• Ram Bits: 1229184
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• No. Of Macrocells: 21580
• Family Type: Arria GX
• No. Of I/o's: 230
• Operating Frequency Max: 622.08MHz
• Operating Temperature Range: 0°C To +85°C
• Logic Case Style: BGA
• No. Of Pins: 484
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2395

2–36
Figure 2–31. 4 × 2 Crossbar Switch Example
Arria GX Device Handbook, Volume 1
sel0[1..0]
sel1[1..0]
inputa
inputb
inputc
inputd
To pack two five-input functions into one ALM, the functions must have at least two
common inputs. The common inputs are dataa and datab. The combination of a
four-input function with a five-input function requires one common input
(either dataa or datab).
To implement two six-input functions in one ALM, four inputs must be shared and
the combinational function must be the same. For example, a 4 × 2 crossbar switch
(two 4-to-1 multiplexers with common inputs and unique select lines) can be
implemented in one ALM, as shown in
datab, datac, and datad, while the unique select lines are datae0 and dataf0 for
function0, and datae1 and dataf1 for function1. This crossbar switch
consumes four LUTs in a four-input LUT-based architecture.
In a sparsely used device, functions that can be placed into one ALM can be
implemented in separate ALMs. The Quartus II Compiler spreads a design out to
achieve the best possible performance. As a device begins to fill up, the Quartus II
software automatically uses the full potential of the Arria GX ALM. The Quartus II
Compiler automatically searches for functions of common inputs or completely
independent functions to be placed into one ALM and to make efficient use of the
device resources. In addition, you can manually control resource usage by setting
location assignments. Any six-input function can be implemented utilizing inputs
dataa, datab, datac, datad, and either datae0 and dataf0 or datae1 and
dataf1. If datae0 and dataf0 are used, the output is driven to register0,
and/or register0 is bypassed and the data drives out to the interconnect using the
top set of output drivers (refer to
output drives to register1 and/or bypasses register1 and drives to the
interconnect using the bottom set of output drivers. The Quartus II Compiler
automatically selects the inputs to the LUT. Asynchronous load data for the register
comes from the datae or dataf input of the ALM. ALMs in normal mode support
register packing.
4 ´ 2 Crossbar Switch
out0
out1
datae0
datae1
dataf0
dataf1
dataa
datab
datad
datac
Figure
Implementation in 1 ALM
Figure
2–32). If datae1 and dataf1 are used, the
(Function0)
(Function1)
2–31. The shared inputs are dataa,
Six-Input
Six-Input
LUT
LUT
© December 2009 Altera Corporation
Chapter 2: Arria GX Architecture
combout0
combout1
Adaptive Logic Modules