XA3S700A-4FGG400Q Xilinx Inc, XA3S700A-4FGG400Q Datasheet - Page 53

IC FPGA SPARTAN-3A 700K 400-FBGA

XA3S700A-4FGG400Q

Manufacturer Part Number
XA3S700A-4FGG400Q
Description
IC FPGA SPARTAN-3A 700K 400-FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3A XAr
Datasheet

Specifications of XA3S700A-4FGG400Q

Number Of Logic Elements/cells
13248
Number Of Labs/clbs
1472
Total Ram Bits
368640
Number Of I /o
311
Number Of Gates
700000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 125°C
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 54: Configuration Timing Requirements for Attached Parallel NOR Flash
DS681 (v1.1) February 3, 2009
Product Specification
Notes:
1.
2.
3.
T
(t
T
(t
T
(t
T
(t
ACC
CE
ELQV
OE
GLQV
AVQV
BYTE
FLQV,
Symbol
These requirements are for successful FPGA configuration in BPI mode, where the FPGA generates the CCLK signal. The
post-configuration timing can be different to support the specific needs of the application loaded into the FPGA.
Subtract additional printed circuit board routing delay as required by the application.
The initial BYTE# timing can be extended using an external, appropriately sized pull-down resistor on the FPGA’s LDC2 pin. The resistor
value also depends on whether the FPGA’s PUDC_B pin is High or Low.
)
)
)
t
FHQV
)
R
Parallel NOR Flash PROM chip-select time
Parallel NOR Flash PROM output-enable time
Parallel NOR Flash PROM read access time
For x8/x16 PROMs only: BYTE# to output valid time
Description
www.xilinx.com
(3)
T
ACC
50%T
T
CCLKn min
T
T
BYTE
CE
OE
Requirement
(
T
T
T
INITADDR
INITADDR
INITADDR
)
T
CCO
T
DCC
PCB
Units
ns
ns
ns
ns
53

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