MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 367

• Manufacturer Part Number: MC68340AG16E
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16E

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

8.4.4 Status Register (SR)
The SR contains timer status information as well as the state of the prescaler. This
register is updated on the rising edge of the system clock when a read of its location is not
in progress, allowing the most current information to be contained in this register. The
register can be read, and the TO, TG, and TC bits can be written when the timer module is
enabled (i.e., the STP bit in the MCR is cleared).
SR
RESET ( TGATE NEGATED):
RESET ( TGATE ASSERTED):
IRQ—Interrupt Request bit
MOTOROLA
IRQ
15
0
0
Disabled—TOUTx is disabled and three-stated.
Toggle Mode—If the timer is disabled (SWR = 0) when this encoding is programmed,
TOUTx is immediately set to zero. If the timer is enabled (SWR = 1), timeout events
(counter reaches $0000) toggle TOUTx. In the input capture/output compare mode,
TOUTx is immediately set to zero if the timer is disabled (SWR = 0). If the timer is
enabled (SWR = 1), timer compare events toggle TOUTx. (Timer compare events occur
when the counter reaches the value stored in the COM.)
Zero Mode—If the timer is disabled (SWR = 0) when this encoding is programmed,
TOUTx is immediately set to zero. If the timer is enabled (SWR = 1), TOUTx will be set
to zero at the next timeout. In the input capture/output compare mode, TOUTx is
immediately set to zero if the timer is disabled (SWR = 0). If the timer is enabled (SWR
= 1), TOUTx will be set to zero at timeouts and set to one at timer compare events. If
the COM is $0000, TOUTx will be set to zero at the timeout/timer compare event.
One Mode—If the timer is disabled (SWR = 0) when this encoding is programmed,
TOUTx is immediately set to one. If the timer is enabled (SWR = 1), TOUTx will be set
to one at the next timeout. In the input capture/output compare mode, TOUTx is
immediately set to one if the timer is disabled (SWR = 0). If the timer is enabled (SWR =
1), TOUTx will be set to one at timeouts and set to zero at timer compare events. If the
COM is $0000, TOUTx will be set to one at the timeout/timer compare event.
The positioning of this bit in the most significant location in this register allows it it be
conditionally tested as if it were a signed binary integer.
1 = An interrupt condition has occurred. This bit is the logical OR of the enabled TO,
0 = The bit(s) that caused the interrupt condition has been cleared. If an IRQ signal
TO
14
0
0
TG, and TC interrupt bits.
has been asserted, it is negated when this bit is cleared.
TG
13
0
0
TC
12
0
0
TGL
Freescale Semiconductor, Inc.
11
1
0
For More Information On This Product,
ON
10
0
0
MC68340 USER’S MANUAL
Go to: www.freescale.com
OUT
9
0
0
COM
8
0
0
PO7
7
1
1
PO6
6
1
1
PO5
5
1
1
PO4
4
1
1
PO3
3
1
1
Supervisor/User
PO2
2
1
1
$608, $648
PO1
1
1
1
PO0
0
1
1
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