MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 7

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MC68340AG16E

Manufacturer Part Number
MC68340AG16E
Description
IC MPU 32BIT 16MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68340AG16E

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68340AG16E
Manufacturer:
Freescale Semiconductor
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Manufacturer:
FREESCALE
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Part Number:
MC68340AG16E
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Freescale Semiconductor
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Part Number:
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Manufacturer:
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Part Number:
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11/2/95
Paragraph
3.4
3.4.1
3.4.2
3.4.3
3.4.4
3.4.4.1
3.4.4.2
3.4.4.3
3.5
3.5.1
3.5.2
3.5.3
3.5.4
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
3.7
4.1
4.2
4.2.1
4.2.2
4.2.2.1
4.2.2.2
4.2.2.3
4.2.2.4
4.2.2.5
4.2.2.6
4.2.2.6.1
4.2.2.6.2
4.2.2.7
4.2.3
4.2.3.1
4.2.3.2
4.2.3.3
4.2.4
4.2.4.1
vi
Number
CPU Space Cycles........................................................................................... 3-21
Bus Exception Control Cycles........................................................................ 3-32
Bus Arbitration................................................................................................... 3-40
Reset Operation ................................................................................................ 3-46
Module Overview.............................................................................................. 4-1
Module Operation............................................................................................. 4-2
TABLE OF CONTENTS (Continued)
Breakpoint Acknowledge Cycle................................................................. 3-22
LPSTOP Broadcast Cycle........................................................................... 3-23
Module Base Address Register Access.................................................... 3-27
Interrupt Acknowledge Bus Cycles............................................................ 3-27
Bus Errors....................................................................................................... 3-34
Retry Operation ............................................................................................. 3-36
Halt Operation ............................................................................................... 3-38
Double Bus Fault .......................................................................................... 3-39
Bus Request................................................................................................... 3-43
Bus Grant........................................................................................................ 3-43
Bus Grant Acknowledge.............................................................................. 3-43
Bus Arbitration Control................................................................................. 3-44
Show Cycles.................................................................................................. 3-44
Module Base Address Register Operation............................................... 4-2
System Configuration and Protection Operation.................................... 4-3
Clock Synthesizer Operation...................................................................... 4-9
Chip Select Operation ................................................................................. 4-13
Interrupt Acknowledge Cycle—Terminated Normally........................ 3-27
Periodic Interrupt Timer ........................................................................... 4-7
Simultaneous Interrupts by Sources in the SIM40............................. 4-9
Autovector Interrupt Acknowledge Cycle ............................................. 3-29
Spurious Interrupt Cycle.......................................................................... 3-30
System Configuration .............................................................................. 4-5
Internal Bus Monitor ................................................................................. 4-6
Double Bus Fault Monitor........................................................................ 4-6
Spurious Interrupt Monitor ...................................................................... 4-6
Software Watchdog.................................................................................. 4-6
Phase Comparator and Filter ................................................................. 4-11
Frequency Divider .................................................................................... 4-12
Clock Control............................................................................................. 4-13
Programmable Features.......................................................................... 4-14
Periodic Timer Period Calculation..................................................... 4-8
Using the Periodic Timer as a Real-Time Clock ............................. 4-9
Freescale Semiconductor, Inc.
For More Information On This Product,
SECTION 1: OVERVIEW
System Integration Module
MC68340 USER'S MANUAL
Go to: www.freescale.com
Section 4
Title
UM Rev.1.0
MOTOROLA
Number
P a g e

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