MC68EC020FG25 Freescale Semiconductor, MC68EC020FG25 Datasheet - Page 171

IC MPU 32 BIT 25MHZ 100-QFP

MC68EC020FG25

Manufacturer Part Number
MC68EC020FG25
Description
IC MPU 32 BIT 25MHZ 100-QFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC020FG25

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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information to the main processor during the execution of these instructions. These
coprocessor format codes are discussed in detail in 7.2.3.2 Coprocessor Format Words.
7.2.3.1 COPROCESSOR INTERNAL STATE FRAMES. The context save (cpSAVE) and
context restore (cpRESTORE) instructions transfer an internal coprocessor state frame
between memory and a coprocessor. This internal coprocessor state frame represents the
state of coprocessor operations. Using the cpSAVE and cpRESTORE instructions, it is
possible to interrupt coprocessor operation, save the context associated with the current
operation, and initiate coprocessor operations with a new context.
A cpSAVE instruction stores a coprocessor internal state frame as a sequence of long-
word entries in memory. Figure 7-14 shows the format of a coprocessor state frame. The
format and length fields of the coprocessor state frame format comprise the format word.
During execution of the cpSAVE instruction, the MC68020/EC020 calculates the state
frame effective address from information in the operation word of the instruction and
stores a format word at this effective address. The processor writes the long words that
form the coprocessor state frame to descending memory addresses, beginning with the
address specified by the sum of the effective address and the length field multiplied by
four. During execution of the cpRESTORE instruction, the MC68020/EC020 reads the
state frame from ascending addresses beginning with the effective address specified in
the instruction operation word.
The processor stores the coprocessor format word at the lowest address of the state
frame in memory, and this word is the first word transferred for both the cpSAVE and
cpRESTORE instructions. The word following the format word does not contain
information relevant to the coprocessor state frame, but serves to keep the information in
the state frame a multiple of four bytes in size. The number of entries following the format
word (at higher addresses) is determined by the format word length for a given
coprocessor state.
7-18
ORDER
SAVE
n–1
n–2
0
n
1
RESTORE
ORDER
0
1
2
3
n
Figure 7-14. Coprocessor State Frame Format in Memory
31
FORMAT
24
M68020 USER’S MANUAL
23
COPROCESSOR-DEPENDENT INFORMATION
LENGTH
16
15
(UNUSED, RESERVED)
MOTOROLA
0

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