MC68MH360EM33L Freescale Semiconductor, MC68MH360EM33L Datasheet - Page 152

• Manufacturer Part Number: MC68MH360EM33L
• Description: IC MPU QUICC ETHER 33MHZ 240FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360EM33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Freescale Semiconductor, Inc.
CPU32+
5.3.1 M68000 Family Compatibility
It is the philosophy of the M68000 Family that all user-mode programs should execute
unchanged on a more advanced processor and that supervisor-mode programs and excep-
tion handlers should require only minimal alteration.
The CPU32+ can be thought of as an intermediate member of the M68000 family. Object
code from an MC68000 or MC68010 may be executed on the CPU32+, and many of the
instruction and addressing mode extensions of the MC68020 are also supported.
5.3.1.1 NEW INSTRUCTIONS. Two instructions have been added to the M68000 instruc-
tion set: LPSTOP and TBL.
5.3.1.2 LOW-POWER STOP (LPSTOP). In applications where power consumption is a
consideration, the CPU32+ can force the device into a low-power standby mode when
immediate processing is not required. The low-power mode is entered by executing the
LPSTOP instruction. The processor remains in this mode until a user-specified or higher
level interrupt or a reset occurs.
5.3.1.3 TABLE LOOKUP AND INTERPOLATE (TBL). To maximize throughput for real-
time applications, reference data is often precalculated and stored in memory for quick
access. The storage of sufficient data points can require an inordinate amount of memory.
The TBL instruction uses linear interpolation to recover intermediate values from a sample
of data points, thus conserving memory.
When the TBL instruction is executed, the CPU32+ looks up two table entries bounding the
desired result and performs a linear interpolation between them. Byte, word, and long-word
operand sizes are supported. The result can be rounded according to a round-to-nearest
algorithm or returned unrounded along with the fractional portion of the calculated result
(byte and word results only). This extra precision can be used to reduce cumulative error in
complex calculations. See 5.3.4 Using the TBL Instructions for examples.
5.3.1.4 UNIMPLEMENTED INSTRUCTIONS. The ability to trap on unimplemented instruc-
tions allows user-supplied code to emulate unimplemented capabilities or to define special-
purpose functions. However, Motorola reserves the right to use all currently unimplemented
instruction operation codes for future M68000 enhancements. See 5.5.2.8 Illegal or Unim-
plemented Instructions for more details.
5.3.2 Instruction Format and Notation
All instructions consist of at least one word. Some instructions can have as many as seven
words, as shown in Figure 5-6. The first word of the instruction, called the operation word,
specifies instruction length and the operation to be performed. The remaining words, called
extension words, further specify the instruction and operands. These words may be imme-
diate operands, extensions to the effective address mode specified in the operation word,
branch displacements, bit number, special register specifications, trap operands, or argu-
ment counts.
5-10
MC68360 USER’S MANUAL
MOTOROLA
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