MC68MH360ZP25VL Freescale Semiconductor, MC68MH360ZP25VL Datasheet - Page 9

• Manufacturer Part Number: MC68MH360ZP25VL
• Description: IC MPU QUICC ETHER 25MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

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Figure
Number
QMC Channel Addressing Capability ............................................................................. 1-2
Ethernet-to-BRI Bridge Using MC68EN360................................................................... 1-6
Internal Routing for Ethernet-to-BRI Bridge Using MC68EN360.................................. 1-7
Ethernet-to-BRI Bridge Using MC68MH360 ................................................................. 1-8
Internal Routing for Ethernet-to-BRI Bridge Using MC68MH360 ................................ 1-8
Ethernet-to-PRI Bridge Using MPC860MH.................................................................... 1-9
Internal Routing for Ethernet-to-PRI Bridge Using MPC860 ......................................... 1-9
Frame Structures for E1/CEPT and T1 TDM Interfaces ............................................... 1-12
MC68MH360 Connection to a TDM Bus ..................................................................... 1-13
MC68MH360 and MPC860MH Internal Memory Structures......................................... 2-1
QMC Memory Structure .................................................................................................. 2-2
Time Slot Assignment Table ........................................................................................... 2-8
Time Slot Assignment Table for 64-Channel Common Rx and Tx Mapping............... 2-10
Rx Time Slot Assignment Table for 32 Channels over Two SCCs............................... 2-11
Time Slot Assignment Tables for 64 Channels over 2 SCCs ........................................ 2-13
CHAMR—Channel Mode Register (HDLC) ................................................................ 2-15
TSTATE—Tx Internal State (HDLC) ........................................................................... 2-17
INTMSK and Interrupt Table Entry (HDLC)................................................................ 2-18
RSTATE—Rx Internal State (HDLC)........................................................................... 2-19
CHAMR—Channel Mode Register (Transparent Mode).............................................. 2-21
TSTATE—Tx Internal State (Transparent Mode)......................................................... 2-23
INTMSK and Interrupt Table Entry (Transparent Mode) ............................................. 2-24
Examples of Different T1 Time Slot Allocation............................................................ 2-27
RSTATE—Rx Internal State (Transparent Mode) ........................................................ 2-28
Command Register (CR).................................................................................................. 3-1
Circular Interrupt Table in External Memory.................................................................. 4-1
SCC Event Register ......................................................................................................... 4-4
SCCM Register ................................................................................................................ 4-5
Interrupt Table Entry........................................................................................................ 4-5
Channel Interrupt Flow .................................................................................................... 4-8
Receive Buffer Descriptor (RxBD) ................................................................................. 5-1
Nonoctet Alignment Data ................................................................................................ 5-4
Transmit Buffer Descriptor (TxBD) ................................................................................ 5-5
Relation between PAD and NOF..................................................................................... 5-6
MC68MH360 Internal Memory....................................................................................... 5-8
SCC2 Parameter RAM Overlap Example........................................................................ 5-8
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