UDA1384H/N1,518 NXP Semiconductors, UDA1384H/N1,518 Datasheet - Page 44

IC AUDIO CODER/DECODER 44QFP

UDA1384H/N1,518

Manufacturer Part Number
UDA1384H/N1,518
Description
IC AUDIO CODER/DECODER 44QFP
Manufacturer
NXP Semiconductors
Type
Audio Codecr
Datasheet

Specifications of UDA1384H/N1,518

Data Interface
I²C, Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
5 / 6
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
98 / 110 (Differential), 98 / 110 (Single-Ended)
Voltage - Supply, Analog
2.7 V ~ 3.6 V
Voltage - Supply, Digital
2.7 V ~ 3.6 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935274756518
UDA1384H-T
UDA1384H-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UDA1384H/N1,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
Table 66:
V
referenced to ground (pins V
[1]
[2]
Table 67:
V
f
9397 750 14366
Product data sheet
Symbol
Single-ended mode
V
(THD + N)/S total harmonic
S/N
Symbol
System clock (see
T
t
t
I
Serial data of audio ADC and DAC (see
f
T
t
t
t
t
t
t
t
t
t
s
CWL
CWH
2
BCK
BCKH
BCKL
r
f
su(WS)
h(WS)
su(DATAI)
h(DATAI)
h(DATAO)
DDD
DDD
V
cs
sys
cy(BCK)
o(rms)
S-bus interface
= 48 kHz; unless otherwise specified.
o
The input voltage can be up to 2 V (RMS) when the current through the ADC input pin is limited to approximately 1 mA by using a series
resistor.
The input voltage to the ADC scales proportionally with the power supply voltage.
= V
= V
DDA(AD)
DDA(AD)
Characteristics
Timing
Parameter
output voltage (RMS value)
output voltage unbalance between
channels
distortion-plus-noise to signal ratio
signal-to-noise ratio
channel separation
Parameter
system clock cycle time
system clock LOW time
system clock HIGH time
audio bit clock frequency
BCK cycle time
bit clock HIGH time
bit clock LOW time
rise time
fall time
word select set-up time
word select hold time
data input set-up time
data input hold time
data output hold time
15.1 Timing
= V
= V
DDA(DA)
DDA(AD)
Figure
= 3.3 V; f
= 2.7 V to 3.6 V; T
16)
SS
…continued
); unless otherwise specified.
i
= 1 kHz; T
Figure
amb
Conditions
f
f
f
f
f
f
f
f
sys
sys
sys
sys
sys
sys
sys
sys
17)
amb
Rev. 02 — 17 January 2005
= 256f
= 384f
= 512f
= 768f
< 19.2 MHz
< 19.2 MHz
= 20 C to +85 C; typical timing specified at sampling frequency
Conditions
at 0 dBFS digital input
at 0 dBFS
at 20 dBFS
at 60 dBFS; A-weighted
code = 0; A-weighted
19.2 MHz
19.2 MHz
= 25 C; R
s
s
s
s
L
= 22 k ; sampling frequency f
[1]
[1]
[1]
[1]
[2]
Min
35
23
17
17
0.3T
0.4T
0.3T
0.4T
-
-
30
30
-
-
10
10
10
10
0
sys
sys
sys
sys
Multichannel audio coder-decoder
Typ
81
54
41
27
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Min
-
-
-
-
-
-
-
s
= 48 kHz; all voltages
Typ
1.0
< 0.1
105
110
88
85
45
Max
780
520
390
260
0.7T
0.6T
0.7T
0.6T
12.8
78
-
-
20
20
-
-
-
-
-
UDA1384
sys
sys
sys
sys
Max
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
V
dB
dB
dB
dB
dB
dB
44 of 55

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