SC18IS602BIPW,112 NXP Semiconductors, SC18IS602BIPW,112 Datasheet
SC18IS602BIPW,112
Specifications of SC18IS602BIPW,112
935286182112
SC18IS602BIPW
SC18IS602BIPW,112
SC18IS602BIPW
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SC18IS602BIPW,112 Summary of contents
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SC18IS602B 2 I C-bus to SPI bridge Rev. 5 — 3 August 2010 1. General description The SC18IS602B is designed to serve as an interface between a standard I microcontroller and an SPI bus. This allows the microcontroller to communicate ...
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... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Name SC18IS602BIPW TSSOP16 5. Block diagram SCL SDA RESET INT (1) Unused slave select outputs may be used for GPIO. Fig 1. SC18IS602B Product data sheet Description plastic thin shrink small outline package; 16 leads; body width 4.4 mm ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. 6.2 Pin description Table 2. Symbol SS0/GPIO0 SS1/GPIO1 RESET V SS MISO MOSI SDA SCL INT SS2/GPIO2 SPICLK V DD SS3/GPIO3 SC18IS602B Product data sheet SS0/GPIO0 1 SS1/GPIO1 2 3 RESET SC18IS602BIPW MISO 5 MOSI 6 SDA 7 8 SCL Pin configuration for TSSOP16 ...
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... C-bus configuration 2 C-bus master is reading data from SC18IS602B, the All information provided in this document is subject to legal disclaimers. Rev. 5 — 3 August 2010 SC18IS602B 2 I C-bus to SPI bridge 2 C-bus and an SPI interface. It allows an Figure 3. (Refer to NXP Semiconductors R PU SDA SCL C-BUS I C-BUS DEVICE DEVICE ...
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... NXP Semiconductors 7.1.1 Addressing Fig 4. The first seven bits of the first byte sent after a START condition defines the slave address of the device being accessed on the bus. The eighth bit determines the direction of the message. A ‘0’ in the least significant position of the first byte means that the master will write information to a selected slave. A ‘ ...
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... NXP Semiconductors the Function ID. There is no restriction on the number or combination of Slave Selects that can be enabled for an SPI message. If more than one SSn pin is enabled at one time, the user should be aware of possible contention on the data outputs of the SPI slave devices. Table The data on the SPI port will contain the same information as the I the slave address and Function ID ...
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... NXP Semiconductors 7.1.5 Configure SPI Interface - Function ID F0h The SPI hardware operating mode, data direction, and frequency can be changed by sending a ‘Configure SPI Interface’ command to the I Fig 9. After the SC18IS602B address is transmitted on the bus, the Configure SPI Interface Function ID (F0h) is sent followed by a byte which will define the SPI communications. ...
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... NXP Semiconductors 7.1.6 Clear Interrupt - Function ID F1h An interrupt is generated by the SC18IS602B after any SPI transmission has been completed. This interrupt can be cleared (INT pin HIGH) by sending a ‘Clear Interrupt’ command not necessary to clear the interrupt; when polling the device, this function may be ignored ...
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... NXP Semiconductors 7.1.9 GPIO Read - Function ID F5h The state of the pins defined as GPIO may be read into the SC18IS602B data buffer using the GPIO Read function. Fig 13. GPIO Read Note that this function does not return the value of the GPIO. To receive the GPIO contents, a one-byte Read Buffer command would be required ...
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... NXP Semiconductors 7.1.11 GPIO Configuration - Function ID F7h The pins defined as GPIO may be configured by software to one of four types on a pin-by-pin basis. These are: quasi-bidirectional, push-pull, open-drain, and input-only. Two bits select the output type for each port pin. Table 9. 7 SS3.1 Table 10. ...
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... NXP Semiconductors pulled LOW by an external device, the weak pull-up turns off, and only the very weak pull-up remains on. In order to pull the pin LOW under these conditions, the external device has to sink enough current to overpower the weak pull-up and pull the pin below its input threshold voltage. The third pull-up is referred to as the ‘ ...
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... NXP Semiconductors Fig 16. Open-drain output configuration 7.1.11.3 Input-only configuration The input-only pin configuration is shown in also has a glitch suppression circuit. Fig 17. Input-only configuration 7.1.11.4 Push-pull output configuration The push-pull output configuration has the same pull-down structure as both the open-drain and the quasi-bidirectional output modes but provides a continuous strong pull-up when the port latch contains a logic 1 ...
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... NXP Semiconductors 7.2 SPI interface The SPI interface can support Mode 0 through Mode 3 of the SPI specification and can operate up to 1.8 Mbit/s. The SPI interface uses at least four pins: SPICLK, MOSI, MISO, and Slave Select (SSn). SSn are the slave select pins typical configuration, an SPI master selects one SPI device as the current slave ...
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... NXP Semiconductors 6. Read the 8 bytes from the EEPROM. Note that we are writing a command, even though we are going to perform a read from the SPI port. The Function ID is again 04h, indicating that we are going to use SS2. The EEPROM requires that you send a 03h for a read, followed by the subaddress you would like to read. We are going to read back the same data previously written, so this means that the subaddress should be 0030h ...
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... NXP Semiconductors 10. Static characteristics Table 12. Static characteristics − 2 3 amb Symbol Parameter I operating supply current DD(oper) I Idle mode supply current DD(idle) V HIGH-LOW threshold voltage th(HL) V LOW-HIGH threshold voltage th(LH) V hysteresis voltage hys V LOW-level output voltage OL V HIGH-level output voltage OH C input capacitance at gate ...
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... NXP Semiconductors 11. Dynamic characteristics Table 13. Dynamic characteristics − 2 3 amb Symbol Parameter f internal RC oscillator osc(RC) frequency Glitch filter t glitch rejection time gr t signal acceptance time sa SPI master interface f SPI operating frequency SPI T SPI cycle time SPICYC t SPICLK HIGH time SPICLKH t SPICLK LOW time ...
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... NXP Semiconductors SPICLK (CPOL = 0) (output) SPICLK (CPOL = 1) (output) MISO (input) t SPIF MOSI (output) Fig 20. SPI master timing (CPHA = 1) SC18IS602B Product data sheet T SPICYC t t SPIF SPIR t t SPICLKL SPICLKH t SPIF t t SPICLKH SPICLKL t t SPIDSU SPIDH MSB/LSB SPIDV SPIOH master MSB/LSB out All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... NXP Semiconductors 12. Package outline TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 22. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 14. Abbreviations Table 16. Acronym CDM CPU EEPROM ESD GPIO HBM I C-bus LSB MM MSB SPI SC18IS602B Product data sheet ...
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... NXP Semiconductors 15. Revision history Table 17. Revision history Document ID Release date SC18IS602B v.5 20100803 • Modifications: • • • • • • • • SC18IS602_602B_603 v.4 20080311 SC18IS602_603 v.3 20070813 SC18IS602_603 v.2 20061213 SC18IS602_603 v.1 20060926 SC18IS602B Product data sheet Data sheet status Product data sheet Type number SC18IS603IPW (basic type SC18IS603) removed from data sheet ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... For sales office addresses, please send an email to: SC18IS602B Product data sheet own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 4 2 7.1 I C-bus interface 7.1.1 Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.1.2 Write to data buffer . . . . . . . . . . . . . . . . . . . . . . 5 7.1.3 SPI read and write - Function ID 01h to 0Fh . . 5 7 ...