ICS1893BF IDT, Integrated Device Technology Inc, ICS1893BF Datasheet - Page 111

PHYCEIVER LOW PWR 3.3V 48-SSOP

ICS1893BF

Manufacturer Part Number
ICS1893BF
Description
PHYCEIVER LOW PWR 3.3V 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheets

Specifications of ICS1893BF

Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Not Compliant
Other names
1893BF

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9.5.2 Timing for Transmit Clock (TXCLK) Pins
ICS1893BF, Rev. F, 5/13/10
TXCLK
Table 9-9
interfaces.
Table 9-9. Transmit Clock Timing
Figure 9-3. Transmit Clock Timing Diagram
Period
Time
t2a
t2b
t1
ICS1893BF Data Sheet Rev. F - Release
lists the significant time periods for signals on the Transmit Clock (TXCLK) pins for the various
TXCLK Duty Cycle
TXCLK Period
TXCLK Period
Figure 9-3
Parameter
shows the timing diagram for the time periods.
100M MII (100Base-TX)
10M MII (10Base-T)
Copyright © 2009, IDT, Inc.
All rights reserved.
t1
111
Conditions
t2x
Chapter 9 DC and AC Operating Conditions
Min.
35
Typ. Max. Units
400
50
40
65
May, 2010
ns
ns
%

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