AD9891KBC Analog Devices Inc, AD9891KBC Datasheet - Page 3

• Manufacturer Part Number: AD9891KBC
• Description: IC CCD SIGNAL PROC/GEN 64-CSPBGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 10-Bitr

Specifications of AD9891KBC

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 64-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Operating Supply Voltage (min): 2.7/3V
• Resolution: 10b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: CSPBGA
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

AD9891/AD9895–SPECIFICATIONS
Parameter
TEMPERATURE RANGE
POWER SUPPLY VOLTAGE
POWER DISSIPATION–AD9891 (See TPC 1 for Power Curves)
POWER DISSIPATION–AD9895 (See TPC 4 for Power Curves)
MAXIMUM CLOCK RATE (CLI)
*
Reducing the H-loading, using only two of the outputs, and/or using a lower HVDD supply will reduce the power dissipation.
Actual HVDD power may be slightly higher than the calculated value because of stray capacitance inherent in the PCB layout/routing.
Specifications subject to change without notice.
DIGITAL SPECIFICATIONS
Parameter
LOGIC INPUTS
LOGIC OUTPUTS (Except H and RG)
RG and H-DRIVER OUTPUTS (H1–H4)
Specifications subject to change without notice.
REV. A
The total power dissipated by the HVDD supply may be approximated using the equation:
Operating
Storage
AVDD1, AVDD2 (AFE Analog Supply)
TCVDD (Timing Core Analog Supply)
RGVDD (RG Driver)
HVDD (H1–H4 Drivers)
DRVDD (Data Output Drivers)
DVDD (Digital)
20 MHz, Typ Supply Levels, 100 pF H1–H4 Loading
Power from HVDD Only
Power-Down 1 Mode
Power-Down 2 Mode
Power-Down 3 Mode
30 MHz, Typ Supply Levels, 100 pF H1–H4 Loading
Power from HVDD Only
Power-Down 1 Mode
Power-Down 2 Mode
Power-Down 3 Mode
AD9891
AD9895
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
High Level Output Voltage @ I
Low Level Output Voltage @ I
High Level Output Voltage @ Max Current
Low Level Output Voltage @ Max Current
Maximum Output Current (Programmable)
Maximum Load Capacitance (for Each Output)
Total HVDD Power = [C
*
*
LOAD
OL
OH
HVDD
= 2 mA
= 2 mA
(RGVDD = HVDD = 4.75 V to 5.25 V, DVDD = DRVDD = 2.7 V to 3.5 V, C
unless otherwise noted.)
Pixel Frequency]
HVDD
Symbol
V
V
I
I
C
V
V
V
V
IH
IL
IH
IL
OH
OL
OH
OL
IN
–3–
Number of H-Outputs Used
Min
–20
–65
2.7
2.7
3.0
3.0
2.7
2.7
20
30
Min
2.1
2.2
VDD – 0.5
24
100
Typ
3.0
3.0
5.0
5.0
3.0
3.0
380
220
42
8
2.5
600
320
138
22
2.5
Typ
10
10
10
Max
+85
+150
3.6
3.6
5.25
5.25
3.6
3.6
Max
0.6
0.5
0.5
L
= 20 pF, T
MIN
to T
V
Unit
°C
°C
V
V
V
V
V
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
MHz
MHz
Unit
V
V
µA
µA
pF
V
V
V
V
mA
pF
MAX
,