M28W320FCT70ZB6E Micron Technology Inc, M28W320FCT70ZB6E Datasheet - Page 12

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M28W320FCT70ZB6E

Manufacturer Part Number
M28W320FCT70ZB6E
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M28W320FCT70ZB6E

Cell Type
NOR
Density
32Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Top
Address Bus
21b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TFBGA
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
2M
Supply Current
18mA
Mounting
Surface Mount
Pin Count
47
Lead Free Status / Rohs Status
Compliant

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2.6
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Signal descriptions
See
connected to this device.
Address inputs (A0-A20)
The Address Inputs select the cells in the memory array to access during Bus Read
operations. During Bus Write operations they control the commands sent to the Command
Interface of the internal state machine.
Data input/output (DQ0-DQ15)
The Data I/O outputs the data stored at the selected address during a Bus Read operation
or inputs a command or the data to be programmed during a Write Bus operation.
Chip Enable (E)
The Chip Enable input activates the memory control logic, input buffers, decoders and
sense amplifiers. When Chip Enable is at V
mode. When Chip Enable is at V
impedance and the power consumption is reduced to the stand-by level.
Output Enable (G)
The Output Enable controls data outputs during the Bus Read operation of the memory.
Write Enable (W)
The Write Enable controls the Bus Write operation of the memory’s Command Interface.
The data and address inputs are latched on the rising edge of Chip Enable, E, or Write
Enable, W, whichever occurs first.
Write Protect (WP)
Write Protect is an input that gives an additional hardware protection for each block. When
Write Protect is at V
cannot be changed. When Write Protect is at V
can be locked or unlocked. (refer to
Figure 1: Logic Diagram
IL
, the Lock-Down is enabled and the protection status of the block
and
IH
Table 1: Signal
the memory is deselected, the outputs are high
Table 7: Read Protection Register and Lock
IL
and Reset is at V
IH
, the Lock-Down is disabled and the block
Names, for a brief overview of the signals
IH
the device is in active
Register).

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