M28W320FCT70ZB6E Micron Technology Inc, M28W320FCT70ZB6E Datasheet - Page 54

• Manufacturer Part Number: M28W320FCT70ZB6E
• Manufacturer: Micron Technology Inc

Specifications of M28W320FCT70ZB6E

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 21b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TFBGA
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 2M
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 47
• Lead Free Status / Rohs Status: Compliant

Table 30.
54/69
(P+7)h = 3Ch
(P+8)h = 3Dh
(P+A)h = 3Fh
(P+C)h = 41h
(P+D)h = 42h
(P+0)h = 35h
(P+1)h = 36h
(P+2)h = 37h
(P+3)h = 38h
(P+4)h = 39h
(P+5)h = 3Ah
(P+6)h = 3Bh
(P+9)h = 3Eh
(P+B)h = 40h
(P+E)h = 43h
P = 35h
Offset
(1)
Primary Algorithm-Specific Extended Query Table
00C0h
0050h
0052h
0049h
0031h
0030h
0066h
0000h
0000h
0000h
0001h
0003h
0000h
0030h
0001h
Data
Major version number, ASCII
Minor version number, ASCII
Primary Algorithm extended Query table unique ASCII string “PRI”
Extended Query table contents for Primary Algorithm. Address (P+5)h
contains less significant byte.
bit 0Chip Erase supported(1 = Yes, 0 = No)
bit 1Suspend Erase supported(1 = Yes, 0 = No)
bit 2Suspend Program supported(1 = Yes, 0 = No)
bit 3Legacy Lock/Unlock supported(1 = Yes, 0 = No)
bit 4Queued Erase supported(1 = Yes, 0 = No)
bit 5Instant individual block locking supported(1 = Yes, 0 = No)
bit 6Protection bits supported(1 = Yes, 0 = No)
bit 7Page mode read supported(1 = Yes, 0 = No)
bit 8Synchronous read supported(1 = Yes, 0 = No)
bit 31 to 9Reserved; undefined bits are ‘0’
Supported Functions after Suspend
Read Array, Read Status Register and CFI Query are always supported
during Erase or Program operation
bit 0Program supported after Erase Suspend (1 = Yes, 0 = No)
bit 7 to 1Reserved; undefined bits are ‘0’
Block Lock Status
Defines which bits in the Block Status Register section of the Query are
implemented.
Address (P+A)h contains less significant byte
bit 0Block Lock Status Register Lock/Unlock bit active(1 = Yes, 0 = No)
bit 1Block Lock Status Register Lock-Down bit active (1 = Yes, 0 = No)
bit 15 to 2Reserved for future use; undefined bits are ‘0’
V
bit 7 to 4HEX value in volts
bit 3 to 0BCD value in 100 mV
V
bit 7 to 4HEX value in volts
bit 3 to 0BCD value in 100 mV
Number of Protection register fields in JEDEC ID space.
"00h," indicates that 256 protection bytes are available
DD
PP
Supply Optimum Program/Erase voltage
Logic Supply Optimum Program/Erase voltage (highest performance)
Description
Value
12V
Yes
Yes
Yes
Yes
Yes
Yes
Yes
"R"
"P"
"1"
"0"
No
No
No
No
No
3V
01
"I"