M28W320FCT70ZB6E Micron Technology Inc, M28W320FCT70ZB6E Datasheet - Page 58

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M28W320FCT70ZB6E

Manufacturer Part Number
M28W320FCT70ZB6E
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M28W320FCT70ZB6E

Cell Type
NOR
Density
32Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Top
Address Bus
21b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TFBGA
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
2M
Supply Current
18mA
Mounting
Surface Mount
Pin Count
47
Lead Free Status / Rohs Status
Compliant

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Figure 18. Quadruple Word Program Flowchart and Pseudo Code
1. Status check of b1 (Protected Block), b3 (V
2. If an error is found, the Status Register must be cleared before further Program/Erase operations.
3. Address 1 to Address 4 must be consecutive addresses differing only for bits A0 and A1.
58/69
or after a sequence.
Write Address 1
Write Address 2
Write Address 3
Write Address 4
Read Status
& Data 1 (3)
& Data 2 (3)
& Data 3 (3)
& Data 4 (3)
Write 56h
Register
b7 = 1
b3 = 0
b4 = 0
b1 = 0
Start
End
YES
YES
YES
YES
NO
NO
NO
NO
Program to Protected
Block Error (1, 2)
V PP Invalid
Error (1, 2)
Error (1, 2)
Program
PP
Invalid) and b4 (Program Error) can be made after each program operation
quadruple_word_program_command (addressToProgram1, dataToProgram1,
{
if (status_register.b3==1) /*VPP invalid error */
if (status_register.b4==1) /*program error */
if (status_register.b1==1) /*program to protect block error */
}
error_handler ( ) ;
error_handler ( ) ;
error_handler ( ) ;
do {
writeToFlash (any_address, 0x56) ;
writeToFlash (addressToProgram1, dataToProgram1) ;
writeToFlash (addressToProgram2, dataToProgram2) ;
writeToFlash (addressToProgram3, dataToProgram3) ;
writeToFlash (addressToProgram4, dataToProgram4) ;
the Program command*/
} while (status_register.b7== 0) ;
status_register=readFlash (any_address) ;
/* E or G must be toggled*/
/*Memory enters read status state after
addressToProgram2, dataToProgram2,
addressToProgram3, dataToProgram3,
addressToProgram4, dataToProgram4)
/*see note (3) */
/*see note (3) */
/*see note (3) */
/*see note (3) */
AI06233

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