AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 100

• Manufacturer Part Number: AGXD533AAXF0CC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AGXD533AAXF0CC

• Device Core: X86
• Device Core Size: 64b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.58V
• Operating Supply Voltage (min): 1.42V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 368
• Package Type: BGD
• Lead Free Status / Rohs Status: Not Compliant

100
31:12
31:9
11:0
31:0
Bit
6:5
1:0
Bit
Bit
Bit
31
8
7
4
3
2
RSVD
RSVD
RSVD
PDBR
RSVD
Name
Name
Name
Name
PFLA
PCE
PGE
PSE
TSC
DE
PG
31505E
Description
Reserved. Set to 0 (always returns 0 when read).
Performance Counter Enable. Set PCE = 1 to make RDPMC available at nonzero priv-
ilege levels.
Page Global Enable. Set PGE = 1 to make global pages immune to INVLPG instruc-
tions.
Reserved. Set to 0 (always returns 0 when read).
Page Size Extensions. Set PSE = 1 to enable 4 MB pages.
Debug Extensions. Set DE = 1 to enable debug extensions (i.e., DR4, DR5, and I/O
breakpoints).
Time Stamp Counter Instruction.
0: RDTSC instruction enabled for all CPL states.
1: RDTSC instruction enabled for CPL = 0 only.
Reserved. Set to 0 (always returns 0 when read).
Description
Page Directory Base Register. Identifies page directory base address on a 4 KB page
boundary.
Reserved. Set to 0.
Description
Page Fault Linear Address. With paging enabled and after a page fault, PFLA contains
the linear address of the address that caused the page fault.
Description
Paging Enable Bit. If PG = 1 and protected mode is enabled (PE = 1), paging is
enabled. After changing the state of PG, software must execute an unconditional branch
instruction (e.g., JMP, CALL) to have the change take effect.
Table 5-10. CR0 Bit Descriptions
Table 5-7. CR4 Bit Descriptions
Table 5-8. CR3 Bit Descriptions
Table 5-9. CR2 Bit Descriptions
AMD Geode™ GX Processors Data Book
CPU Core