AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 328

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AGXD533AAXF0CC

Manufacturer Part Number
AGXD533AAXF0CC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AGXD533AAXF0CC

Device Core
X86
Device Core Size
64b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.58V
Operating Supply Voltage (min)
1.42V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
368
Package Type
BGD
Lead Free Status / Rohs Status
Not Compliant
6.6.16.4
CRTC Index
Type
Reset Value
6.6.16.5
CRTC Index
Type
Reset Value
6.6.16.6
CRTC Index
Type
Reset Value
This register is for simulation and test only.
328
Bit
7:0
Bit
7:0
Bit
6:5
4:0
7
WriteMemoryAperture
ReadMemoryAperture
BlinkCounterCtl
Name
WR_BASE
Name
RD_BASE
Name
HLD_CNT
RSVD
BLNK_CNT
47h
R/W
00h
48h
R/W
00h
60h
R/W
00h
31505E
Description
WriteBase. Offset added to the graphics memory base to specify where VGA write oper-
ations start. This value provides DWORD address bits [23:16] when mapping host VGA
writes to graphics memory. This allows the VGA base address to start on any 64 KB
boundary within the graphics memory.
Description
ReadBase. Offset added to the graphics memory base to specify where VGA read oper-
ations start. This value provides DWORD address bits [23:16] when mapping host VGA
reads to graphics memory. This allows the VGA base address to start on any 64 KB
boundary within the graphics memory.
Description
Hold Count. When set, prevents the blink counter from incrementing with each leading
edge VSYNC.
Reserved. Write as read.
Blink Count. The blink counter is loaded with this value while the sequencer’s Reset
register (SQ Index 00h) is in the reset state.
WriteMemoryAperture Register Bit Descriptions
ReadMemoryAperture Register Bit Descriptions
BlinkCounterCtl Register Bit Descriptions
AMD Geode™ GX Processors Data Book
Display Controller Register Descriptions

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