AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 323

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AGXD533AAXF0CC

Manufacturer Part Number
AGXD533AAXF0CC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AGXD533AAXF0CC

Device Core
X86
Device Core Size
64b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.58V
Operating Supply Voltage (min)
1.42V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
368
Package Type
BGD
Lead Free Status / Rohs Status
Not Compliant
Display Controller Register Descriptions
6.6.14.6
AC Index
Type
Reset Value
6.6.14.7
AC Index
Type
Reset Value
AMD Geode™ GX Processors Data Book
Bit
7:4
3:0
Bit
7:4
3:2
1:0
Horizontal Pel Panning
Color Select
Name
RSVD
Name
RSVD
P[7:6]
P[5:4]
13h
R/W
xxh
14h
R/W
xxh
Horizontal Pel Panning Register Bit Descriptions
Description
Reserved. Write as read.
Horizontal Pel Panning. This field specifies how many pixels the screen image should
be shifted to the left by.
Description
Reserved. Write as read.
P7 and P6. These bits are used to provide the upper two bits of the 8-bit pixel value sent
to the video DAC in all modes except the 256 color mode (mode 13h).
P5 and P4. These bits are used to provide bits 5 and 4 of the 8-bit pixel value sent to the
video DAC when the P5:4 Select bit is set in the Attribute Mode Control register (AC
Index 10h[7]). In this case they replace bits [5:4] coming from the EGA palette.
Bits [3:0]
Color Select Register Bit Descriptions
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Mode 13h
Panning
--
--
--
--
--
--
--
--
--
--
--
--
0
1
2
3
9-Wide Text Mode
Panning
--
--
--
--
--
--
--
1
2
3
4
5
6
7
8
0
31505E
Panning for All
Other Modes
--
--
--
--
--
--
--
0
1
2
3
4
5
6
7
-
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