UPD75P3216GT Renesas Electronics America, UPD75P3216GT Datasheet - Page 14

• Manufacturer Part Number: UPD75P3216GT
• Manufacturer: Renesas Electronics America

Specifications of UPD75P3216GT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

4.2 Setting of Stack Bank Selection (SBS) Register
doing this.
sure to initialize the stack bank selection register to 100XB
mode, be sure to initialize it to 000XB
12
Address
Use the stack bank selection register to switch between Mk I mode and Mk II mode. Figure 4-1 shows the format for
The stack bank selection register is set using a 4-bit memory manipulation instruction. When using the Mk I mode, be
Cautions 1. SBS3 is set to “1” after RESET input, and consequently the CPU operates in Mk I mode. When
Note Set the desired value for X.
F84H
SBS3 SBS2 SBS1 SBS0
2. When using Mk II mode, execute a subroutine call instruction and an interrupt instruction after
3
using instructions for Mk II mode, set SBS3 to “0” and set Mk II mode before using the
instructions.
RESET input and after setting the stack bank selection register.
2
1
Figure 4-1. Format of Stack Bank Selection Register
0
Note
Stack area specification
Mode selection specification
Symbol
.
SBS
0
0
1
1
0
0
1
Data Sheet U10241EJ1V1DS
Be sure to enter “0” for bit 2.
Mk II mode
Mk I mode
0
1
0
1
Memory bank 0
Memory bank 1
Setting prohibited
Note
at the beginning of the program. When using the Mk II
µ PD75P3216