PIC18F4680-H/ML Microchip Technology, PIC18F4680-H/ML Datasheet - Page 266

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PIC18F4680-H/ML

Manufacturer Part Number
PIC18F4680-H/ML
Description
IC MCU 8BIT 64KB FLASH 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet

Specifications of PIC18F4680-H/ML

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F2585/2680/4585/4680
FIGURE 21-1:
21.2
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(Figure 21-1) keep CV
reference source rails. The voltage reference is derived
from the reference source; therefore, the CV
changes with fluctuations in that source. The tested
absolute accuracy of the voltage reference can be
found in Section 27.0 “Electrical Characteristics”.
21.3
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
DS39625C-page 264
Voltage Reference Accuracy/Error
Operation During Sleep
CVRR
V
V
CVREN
V
REF
DD
REF
COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
+
-
REF
CVRSS = 0
CVRSS = 1
from approaching the
CVRSS = 1
CVRSS = 0
16 Steps
REF
output
Preliminary
8R
R
R
R
R
R
R
R
clearing bit CVREN (CVRCON<7>). This Reset also
disconnects the reference from the RA0 pin by clearing
21.4
A device Reset disables the voltage reference by
bit CVROE (CVRCON<6>) and selects the high-voltage
range by clearing bit CVRR (CVRCON<5>). The CVR
value select bits are also cleared.
21.5
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RA0 pin if the
TRISA<0> bit and the CVROE bit are both set.
Enabling the voltage reference output onto the RA0
pin, with an input signal present, will increase current
consumption. Connecting RA0 as a digital output with
CVRSS
consumption.
The RA0 pin can be used as a simple D/A output with
limited drive capability. Due to the limited current drive
capability, a buffer must be used on the voltage
reference output for external connections to V
Figure 21-2 shows an example buffering technique.
8R
Effects of a Reset
Connection Considerations
enabled
CVR3:CVR0
will
© 2007 Microchip Technology Inc.
also
CV
REF
increase
current
REF
.

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