PIC18F4680-H/ML Microchip Technology, PIC18F4680-H/ML Datasheet - Page 283

• Manufacturer Part Number: PIC18F4680-H/ML
• Description: IC MCU 8BIT 64KB FLASH 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4680-H/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 44-VQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 23-4:
© 2007 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Mode 0
Mode 1
Mode 2
Legend:
C = Clearable bit
-n = Value at POR
bit 7
Mode 0:
RXB0OVFL: Receive Buffer 0 Overflow bit
1 = Receive Buffer 0 overflowed
0 = Receive Buffer 0 has not overflowed
Mode 1:
Unimplemented: Read as ‘0’
Mode 2:
FIFOEMPTY: FIFO Not Empty bit
1 = Receive FIFO is not empty
0 = Receive FIFO is empty
Mode 0:
RXB1OVFL: Receive Buffer 1 Overflow bit
1 = Receive Buffer 1 overflowed
0 = Receive Buffer 1 has not overflowed
Mode 1, 2:
RXBnOVFL: Receive Buffer n Overflow bit
1 = Receive Buffer n has overflowed
0 = Receive Buffer n has not overflowed
TXBO: Transmitter Bus-Off bit
1 = Transmit error counter > 255
0 = Transmit error counter ≤ 255
TXBP: Transmitter Bus Passive bit
1 = Transmit error counter > 127
0 = Transmit error counter ≤ 127
RXBP: Receiver Bus Passive bit
1 = Receive error counter > 127
0 = Receive error counter ≤ 127
TXWARN: Transmitter Warning bit
1 = Transmit error counter > 95
0 = Transmit error counter ≤ 95
RXWARN: Receiver Warning bit
1 = 127 ≥ Receive error counter > 95
0 = Receive error counter ≤ 95
EWARN: Error Warning bit
This bit is a flag of the RXWARN and TXWARN bits.
1 = The RXWARN or the TXWARN bits are set
0 = Neither the RXWARN or the TXWARN bits are set
FIFOEMPTY RXBnOVFL
COMSTAT: COMMUNICATION STATUS REGISTER
RXB0OVFL RXB1OVFL
R/C-0
R/C-0
R/C-0
—
RXBnOVFL
R/C-0
R/C-0
R/C-0
R = Readable bit
‘1’ = Bit is set
PIC18F2585/2680/4585/4680
Preliminary
TXBO
TXBO
TXB0
R-0
R-0
R-0
TXBP
TXBP
TXBP
W = Writable bit
‘0’ = Bit is cleared
R-0
R-0
R-0
RXBP
RXBP
RXBP
R-0
R-0
R-0
TXWARN RXWARN EWARN
TXWARN RXWARN EWARN
TXWARN RXWARN EWARN
U = Unimplemented bit, read as ‘0’
x = Bit is unknown
R-0
R-0
R-0
R-0
R-0
R-0
DS39625C-page 281
R-0
R-0
R-0
bit 0