PIC18F4680-H/ML Microchip Technology, PIC18F4680-H/ML Datasheet - Page 95

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PIC18F4680-H/ML

Manufacturer Part Number
PIC18F4680-H/ML
Description
IC MCU 8BIT 64KB FLASH 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet

Specifications of PIC18F4680-H/ML

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
5.6.3
The use of Indexed Literal Offset Addressing mode
effectively changes how the lower half of Access RAM
(00h to 7Fh) is mapped. Rather than containing just the
contents of the bottom half of Bank 0, this mode maps
the contents from Bank 0 and a user defined “window”
that can be located anywhere in the data memory
space. The value of FSR2 establishes the lower bound-
ary of the addresses mapped into the window, while the
upper boundary is defined by FSR2 plus 95 (5Fh).
Addresses in the Access RAM above 5Fh are mapped
as previously described (see Section 5.3.2 “Access
Bank”). An example of Access Bank remapping in this
addressing mode is shown in Figure 5-9.
FIGURE 5-9:
© 2007 Microchip Technology Inc.
Example Situation:
Locations in the region
from the FSR2 pointer
(120h) to the pointer plus
05Fh (17Fh) are mapped
to
Access RAM (000h-05Fh).
Special File Registers at
F60h through FFFh are
mapped to 60h through
FFh, as usual.
Bank 0 addresses below
5Fh are not available in
this mode. They can still
be addressed by using the
BSR.
ADDWF f, d, a
FSR2H:FSR2L = 120h
the
MAPPING THE ACCESS BANK IN
INDEXED LITERAL OFFSET MODE
bottom
of
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL
OFFSET ADDRESSING
the
FFFh
17Fh
F00h
F60h
000h
100h
120h
200h
Data Memory
Window
Bank 14
Bank 15
through
Bank 1
Bank 0
Bank 2
SFRs
PIC18F2585/2680/4585/4680
Preliminary
Remapping of the Access Bank applies only to opera-
tions using the Indexed Literal Offset mode. Operations
that use the BSR (Access RAM bit is ‘1’) will continue
to use direct addressing as before. Any indirect or
indexed operation that explicitly uses any of the indirect
file operands (including FSR2) will continue to operate
as standard indirect addressing. Any instruction that
uses the Access Bank, but includes a register address
of greater than 05Fh, will use direct addressing and the
normal Access Bank map.
5.6.4
Although the Access Bank is remapped when the
extended instruction set is enabled, the operation of the
BSR remains unchanged. Direct addressing using the
BSR to select the data memory bank operates in the
same manner as previously described.
BSR IN INDEXED LITERAL
OFFSET MODE
Bank 1 “Window”
Access Bank
SFRs
DS39625C-page 93
00h
5Fh
60h
FFh

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