PIC18F4680-H/ML Microchip Technology, PIC18F4680-H/ML Datasheet - Page 475

• Manufacturer Part Number: PIC18F4680-H/ML
• Description: IC MCU 8BIT 64KB FLASH 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4680-H/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 44-VQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

RESET ............................................................................. 391
Resets ........................................................................ 41, 343
RETFIE ............................................................................ 392
RETLW ............................................................................ 392
RETURN .......................................................................... 393
Return Address Stack ........................................................ 62
Return Stack Pointer (STKPTR) ........................................ 63
Revision History ............................................................... 461
© 2007 Microchip Technology Inc.
RXBnSIDL (Receive Buffer n Standard
RXERRCNT (Receive Error Count) ......................... 293
RXFBCONn (Receive Filter Buffer Control n) .......... 306
RXFCONn (Receive Filter Control n) ....................... 305
RXFnEIDH (Receive Acceptance Filter n
RXFnEIDL (Receive Acceptance Filter n
RXFnSIDH (Receive Acceptance Filter n
RXFnSIDL (Receive Acceptance Filter n
RXMnEIDH (Receive Acceptance Mask n
RXMnEIDL (Receive Acceptance Mask n
RXMnSIDH (Receive Acceptance Mask n
RXMnSIDL (Receive Acceptance Mask n
SDFLC (Standard Data Bytes
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 189
SSPCON2 (MSSP Control 2, I
SSPSTAT (MSSP Status, I
SSPSTAT (MSSP Status, SPI Mode) ...................... 188
Status ......................................................................... 87
STKPTR (Stack Pointer) ............................................ 63
T0CON (Timer0 Control) .......................................... 147
T1CON (Timer 1 Control) ......................................... 151
T2CON (Timer 2 Control) ......................................... 157
T3CON (Timer3 Control) .......................................... 159
TRISE (PORTE/PSP Control) .................................. 142
TXBIE (Transmit Buffers Interrupt Enable) .............. 318
TXBnCON (Transmit Buffer n Control) .................... 282
TXBnDLC (Transmit Buffer n
TXBnDm (Transmit Buffer n
TXBnEIDH (Transmit Buffer n Extended
TXBnEIDL (Transmit Buffer n Extended
TXBnSIDH (Transmit Buffer n Standard
TXBnSIDL (Transmit Buffer n Standard
TXERRCNT (Transmit Error Count) ........................ 285
TXSTA (Transmit Status and Control) ..................... 228
WDTCON (Watchdog Timer Control) ...................... 353
Brown-out Reset (BOR) ........................................... 343
Oscillator Start-up Timer (OST) ............................... 343
Power-on Reset (POR) ............................................ 343
Power-up Timer (PWRT) ......................................... 343
and Associated Registers .......................................... 62
Identifier, Low Byte) ......................................... 291
Extended Identifier, High Byte) ........................ 303
Extended Identifier, Low Byte) ......................... 303
Standard Identifier Filter, High Byte) ................ 302
Standard Identifier Filter, Low Byte) ................ 302
Extended Identifier Mask, High Byte) .............. 304
Extended Identifier Mask, Low Byte) ............... 304
Standard Identifier Mask, High Byte) ............... 303
Standard Identifier Mask, Low Byte) ................ 304
Filter Length Count) ......................................... 305
Data Length Code) .......................................... 285
Data Field Byte m) ........................................... 284
Identifier, High Byte) ........................................ 283
Identifier, Low Byte) ......................................... 284
Identifier, High Byte) ........................................ 283
Identifier, Low Byte) ......................................... 283
2
C Mode) ....................... 197
2
2
C Mode) ................. 198
C Mode) ................. 199
PIC18F2585/2680/4585/4680
Preliminary
RLCF ............................................................................... 393
RLNCF ............................................................................. 394
RRCF ............................................................................... 394
RRNCF ............................................................................ 395
S
SCK ................................................................................. 187
SDI ................................................................................... 187
SDO ................................................................................. 187
SEC_IDLE Mode ............................................................... 38
SEC_RUN Mode ................................................................ 34
Serial Clock, SCK ............................................................ 187
Serial Data In (SDI) .......................................................... 187
Serial Data Out (SDO) ..................................................... 187
Serial Peripheral Interface. See SPI Mode.
SETF ............................................................................... 395
Slave Select (SS) ............................................................. 187
SLEEP ............................................................................. 396
Sleep
Software Simulator (MPLAB SIM) ................................... 412
Special Event Trigger. See Compare (ECCP1 Module).
Special Features of the CPU ........................................... 343
Special Function Registers ................................................ 70
SPI Mode (MSSP)
SS .................................................................................... 187
SSPOV ............................................................................ 217
SSPOV Status Flag ......................................................... 217
SSPSTAT Register
Stack Full/Underflow Resets .............................................. 64
Status Register .................................................................. 87
SUBFSR .......................................................................... 407
SUBFWB ......................................................................... 396
SUBLW ............................................................................ 397
SUBULNK ........................................................................ 407
SUBWF ............................................................................ 397
SUBWFB ......................................................................... 398
SWAPF ............................................................................ 398
T
Table Pointer Operations (table) ........................................ 98
Table Reads/Table Writes ................................................. 64
TBLRD ............................................................................. 399
TBLWT ............................................................................ 400
Time-out in Various Situations (table) ................................ 45
OSC1 and OSC2 Pin States ...................................... 31
Map ...................................................................... 70–75
Associated Registers ............................................... 195
Bus Mode Compatibility ........................................... 195
Effects of a Reset .................................................... 195
Enabling SPI I/O ...................................................... 191
Master Mode ............................................................ 192
Master/Slave Connection ........................................ 191
Operation ................................................................. 190
Operation in Power Managed Modes ...................... 195
Serial Clock ............................................................. 187
Serial Data In ........................................................... 187
Serial Data Out ........................................................ 187
Slave Mode .............................................................. 193
Slave Select ............................................................. 187
Slave Select Synchronization .................................. 193
SPI Clock ................................................................. 192
Typical Connection .................................................. 191
R/W Bit ............................................................ 200, 201
DS39625C-page 473