PIC18F4680-H/ML Microchip Technology, PIC18F4680-H/ML Datasheet - Page 301

• Manufacturer Part Number: PIC18F4680-H/ML
• Description: IC MCU 8BIT 64KB FLASH 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4680-H/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 44-VQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 23-31: BnEIDL: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
REGISTER 23-32: BnDm: TX/RX BUFFER n DATA FIELD BYTE m REGISTERS IN RECEIVE MODE
REGISTER 23-33: BnDm: TX/RX BUFFER n DATA FIELD BYTE m REGISTERS IN TRANSMIT MODE
© 2007 Microchip Technology Inc.
bit 7-0
bit 7-0
bit 7-0
LOW BYTE IN TRANSMIT MODE [0 ≤ n ≤ 5, TXnEN (BSEL<n>) = 1]
[0 ≤ n ≤ 5, 0 ≤ m ≤ 7, TXnEN (BSEL<n>) = 0]
[0 ≤ n ≤ 5, 0 ≤ m ≤ 7, TXnEN (BSEL<n>) = 1]
bit 7
bit 7
bit 7
EID7:EID0: Extended Identifier bits
Legend:
R = Readable bit
-n = Value at POR
BnDm7:BnDm0: Receive Buffer n Data Field Byte m bits (where 0 ≤ n < 3 and 0 < m < 8)
Each receive buffer has an array of registers. For example, Receive Buffer 0 has 7 registers:
B0D0 to B0D7.
Legend:
R = Readable bit
-n = Value at POR
BnDm7:BnDm0: Transmit Buffer n Data Field Byte m bits (where 0 ≤ n < 3 and 0 < m < 8)
Each transmit buffer has an array of registers. For example, Transmit Buffer 0 has 7 registers:
TXB0D0 to TXB0D7.
Legend:
R = Readable bit
-n = Value at POR
BnDm7
BnDm7
R/W-x
R/W-x
Note 1: These registers are available in Mode 1 and 2 only.
Note 1: These registers are available in Mode 1 and 2 only.
Note 1: These registers are available in Mode 1 and 2 only.
EID7
R-x
BnDm6
BnDm6
R/W-x
R/W-x
EID6
R-x
PIC18F2585/2680/4585/4680
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
BnDm5
BnDm5
R/W-x
R/W-x
EID5
R-x
Preliminary
BnDm4
BnDm4
R/W-x
R/W-x
EID4
R-x
BnDm3
BnDm3
R/W-x
R/W-x
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EID3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
(1)
R-x
BnDm2
BnDm2
R/W-x
R/W-x
EID2
R-x
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
BnDm1
BnDm1
R/W-x
R/W-x
EID1
R-x
DS39625C-page 299
(1)
BnDm0
BnDm0
R/W-x
R/W-x
EID0
R-x
bit 0
bit 0
bit 0