SC16C852VIET,118 NXP Semiconductors, SC16C852VIET,118 Datasheet - Page 31

• Manufacturer Part Number: SC16C852VIET,118
• Description: IC UART DUAL W/FIFO 36TFBGA
• Manufacturer: NXP Semiconductors

Specifications of SC16C852VIET,118

• Features: Programmable
• Number Of Channels: 2, DUART
• Fifo's: 128 Byte
• Protocol: RS485
• Voltage - Supply: 1.8V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 36-TFBGA
• Transmitter And Receiver Fifo Counter: Yes
• Data Rate: 5Mbps
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
SC16C852_1
Product data sheet
7.6 Modem Control Register (MCR)
This register controls the interface with the modem or a peripheral device.
Table 21.
Bit
7
6
5
4
3
2
1
0
Symbol
MCR[7]
MCR[6]
MCR[5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
Description
Clock select
IR enable (see
Reserved; set to ‘0’.
Loopback. Enable the local loopback mode (diagnostics). In this mode the
transmitter output (TX) and the receiver input (RX), CTS, DSR, CD, and RI
are disconnected from the SC16C852 I/O pins. Internally the modem data
and control pins are connected into a loopback data configuration (see
Figure
operational. The Modem Control Interrupts are also operational, but the
interrupts’ sources are switched to the lower four bits of the Modem Control.
Interrupts continue to be controlled by the IER register.
OP2A/OP2B, INT enable
Remark: OP2A/OP2B pins do not exist on the HVQFN32 package.
OP1A/OP1B are not available as an external signal in the SC16C852. This
bit is instead used in the Loopback mode only. In the Loopback mode, this
bit is used to write the state of the modem RI interface signal.
RTS
DTR
Rev. 01 — 31 August 2009
logic 0 = divide-by-1 clock input
logic 1 = divide-by-4 clock input
logic 0 = enable the standard modem receive and transmit input/output
interface (normal default condition)
logic 1 = enable infrared IrDA receive and transmit inputs/outputs. While
in this mode, the TX/RX output/inputs are routed to the infrared
encoder/decoder. The data input and output levels will conform to the
IrDA infrared interface requirement. As such, while in this mode, the
infrared TX output will be a logic 0 during idle data conditions.
logic 0 = disable Loopback mode (normal default condition)
logic 1 = enable local Loopback mode (diagnostics)
logic 0 = forces INT (A, B) outputs to the 3-state mode and sets
OP2A/OP2B to a logic 1 (normal default condition)
logic 1 = forces the INT (A, B) outputs to the active mode and sets
OP2A/OP2B to a logic 0
logic 0 = force RTS output to a logic 1 (normal default condition)
logic 1 = force RTS output to a logic 0
logic 0 = force DTR output to a logic 1 (normal default condition)
logic 1 = force DTR output to a logic 0
Dual UART with 128-byte FIFOs and IrDA encoder/decoder
8). In this mode, the receiver and transmitter interrupts remain fully
Figure
29).
SC16C852
© NXP B.V. 2009. All rights reserved.
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